MCUBoot Fails to Boot Updated Image on Custom nRF7002 Board (is25lp064 SPI NOR)

ItachiVN 9 days ago

Dear Team,

I am experiencing issues updating the firmware image on my custom board based on the nRF7002, using an external SPI NOR flash (is25lp064, 8MB). The board is running nRF Connect SDK v2.9.1. I am able to build and run, and update the new application successfully on the nRF7002DK, but encounter problems when performing an image update on my custom board.

Here's a breakdown of my process and where the issue occurs:

Steps Completed:

Build: Built the application using the following command:

west build --build-dir build --pristine --board nrf7002dk/nrf5340/cpuapp --sysbuild -- -DCONF_FILE="prj.conf" -DDTC_OVERLAY_FILE="app.overlay"

Initial Flash: Flashed the built application to my custom board.
Image Update: While running the main app (not bootloader), I used Auterm to upload a new application image to slot 1 with the test flag.
Verification: Verified that the image hash reported by Auterm matches the hash report from ```imgtool dumpinfo build/spi/zephyr/zephyr.signed.bin```
Reset: Reset the board to trigger MCUBoot to perform the image swap.

Issue:

On reset, MCUBoot logs indicate:

[00:00:00.299,407] <inf> mcuboot: Starting bootloader
[00:00:00.306,243] <dbg> mcuboot: boot_slots_compatible: Non-optimal sector distribution, slot0 has 237 usable sectors (240 assigned) but slot1 has 240 assigned
[00:00:00.321,502] <inf> mcuboot: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
[00:00:00.332,031] <inf> mcuboot: Secondary image: magic=good, swap_type=0x2, copy_done=0x3, image_ok=0x3
[00:00:00.342,285] <inf> mcuboot: Boot source: none
[00:00:00.363,220] <inf> mcuboot: Image index: 0, Swap type: test
[00:00:02.815,612] <err> mcuboot: Image in the secondary slot is not valid!
[00:00:03.027,984] <inf> mcuboot: Bootloader chainload address offset: 0x10000
[00:00:03.035,797] <inf> mcuboot: Jumping to the first image slot

The program then freezes. Attempting to reset and revert to the previous image also fails, with logs showing:

[00:00:00.250,427] <inf> spi_nor: is25lp064d@0: 8 MiBy flash
[00:00:00.256,683] <dbg> spi_nor: spi_nor_process_bfp: Erase 4096 with 20
[00:00:00.264,068] <dbg> spi_nor: spi_nor_process_bfp: Erase 32768 with 52
[00:00:00.271,575] <dbg> spi_nor: spi_nor_process_bfp: Erase 65536 with d8
[00:00:00.279,052] <dbg> spi_nor: spi_nor_process_bfp: Page size 256 bytes
*** Booting MCUboot v2.1.0-dev-12e5ee106034 ***
*** Using nRF Connect SDK v2.9.1-60d0d6c8d42d ***
*** Using Zephyr OS v3.7.99-ca954a6216c9 ***
[00:00:00.299,468] <inf> mcuboot: Starting bootloader
[00:00:00.306,304] <dbg> mcuboot: boot_slots_compatible: Non-optimal sector distribution, slot0 has 237 usable sectors (240 assigned) but slot1 has 240 assigned
[00:00:00.321,594] <inf> mcuboot: Primary image: magic=good, swap_type=0x2, copy_done=0x1, image_ok=0x3
[00:00:00.332,031] <inf> mcuboot: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
[00:00:00.342,376] <inf> mcuboot: Boot source: none
[00:00:00.362,823] <wrn> mcuboot: Failed reading image headers; Image=0
[00:00:00.370,269] <err> mcuboot: Image in the primary slot is not valid!
[00:00:00.377,929] <err> mcuboot: Unable to find bootable image

This issue does not occur when tested with nRF7002DK (by #define CONFIG_TEST_DK_BOARD 1 in the overlay fiiles my attached project source code) where the same process works as expected and I were able to update to new firmware

Device and Software Details:

Device: Custom nRF7002-based board
External Flash: is25lp064 (8MB SPI NOR)
nRF Connect SDK Version: v2.9.1

Additional Information:

Partition table is attached (debug_data/partition.txt).
Full UART logs for the custom board are attached (debug_data/log/custom_board).
SPI flash command traces are provided (debug_data/spi_commands).
Working build/log for the nRF7002DK is available in (debug_data/log/7002dk_working).

Could you kindly help identify if there are any known issues, misconfigurations, or specific steps I might be missing regarding MCUBoot, partitioning, or image update flow for a custom board with external SPI NOR flash? I am happy to provide any further configuration files or logs as needed. Thank you in advance for your expertise and assistance.

Sincerely,
Thuan.
spi_help.zip

Parents

0 AHaug 3 days ago

Hi Thuan,

It could indicate that you've not used the correct SPI nor flash configuration. Could you first try spi nor flash standalone without anything else going on and see if you can communicate with the flash? For instance with something like this sample? https://docs.nordicsemi.com/bundle/ncs-latest/page/zephyr/samples/drivers/spi_flash/README.html

Kind regards,
Andreas
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0 AHaug 3 days ago

Hi Thuan,

It could indicate that you've not used the correct SPI nor flash configuration. Could you first try spi nor flash standalone without anything else going on and see if you can communicate with the flash? For instance with something like this sample? https://docs.nordicsemi.com/bundle/ncs-latest/page/zephyr/samples/drivers/spi_flash/README.html

Kind regards,
Andreas
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0 ItachiVN 3 days ago in reply to AHaug

Hello Andreas,
Thank you for your support.

My test application is based on the spi_flash example. From what I understand, communication with the flash (erase/write/read) is working. I’ve added a few more log messages to provide better visibility into the process.
Below are the logs captured via RTT Viewer:

Test 1: Flash erase

[00:00:00.003,997] <inf> flash_test: Attempting to erase 4096 bytes from offset 0x7f0000
[00:00:00.104,797] <inf> flash_test: Attempting to read 4 bytes from offset 0x7f0000
[00:00:00.105,224] <inf> flash_test: Read data: ff ff ff ff
[00:00:00.105,499] <inf> flash_test: Flash erase succeeded!
[00:00:00.105,743] <inf> flash_test: 
Test 2: Flash write

[00:00:00.106,018] <inf> flash_test: Attempting to write 4 bytes to offset 0x7f0000
[00:00:00.106,323] <inf> flash_test: Write data: aa bb cc dd
[00:00:00.106,842] <inf> flash_test: Attempting to read 4 bytes from offset 0x7f0000
[00:00:00.107,269] <inf> flash_test: Read data: aa bb cc dd
[00:00:00.107,543] <inf> flash_test: Data read matches data written. Good!!
[00:00:00.107,818] <inf> flash_test: Test completed, waiting for next test
[00:00:00.108,093] <inf> flash_test: Entering looping ....

0 AHaug 2 days ago in reply to ItachiVN
Hi,

ItachiVN said:
d on the spi_flash example. From what I understand, communication with the flash (erase/write/read) is working. I’ve added a few more log messages to provide better visibility into the process.
Below are the logs captured via RTT Viewer:

Looks correct to me.

The next item is to look at the boot sectors. The Non-optimal sector distribution is typically caused when CONFIG_BOOT_MAX_IMG_SECTORS is too small (ref: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/bootloaders_dfu/mcuboot_nsib/bootloader_partitioning.html#mcuboot_failure). Could you see if either of the 3 suggested fixes resolves the issue?

The external flash driver for the application image partitions used by MCUboot is not enabled or an incorrect Kconfig option has been given to the DEFAULT_DRIVER_KCONFIG of the Partition Manager external region definition. See External flash memory partitions for details.

An out-of-tree external flash driver is not selecting CONFIG_PM_EXTERNAL_FLASH_HAS_DRIVER, resulting in partitions for images located in the external flash memory being not accessible. See External flash memory partitions for details.

Insufficient value set for the CONFIG_BOOT_MAX_IMG_SECTORS Kconfig option, as MCUboot typically increases slot sizes when external flash is enabled. See MCUboot’s Kconfig options used in Zephyr for details.

Kind regards,
Andreas
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0 ItachiVN 2 days ago in reply to AHaug

Hello Andreas,

Thank you for the detailed suggestions and the helpful references.

I’ve reviewed the current configuration to ensure that the issues you pointed out are properly addressed. Here’s a summary of what I’ve checked and confirmed:

External Flash Driver:
The external flash driver appears to be enabled correctly. From the device tree (build/mcuboot/zephyr/zephyr.dts), the nordic,pm-ext-flash = &is25; is set, and the external flash node (is25lp064d@0) is configured with status = "okay" and the appropriate JEDEC ID and size.

# build/mcuboot/zephyr/zephyr.dts
/ {
    ...
	chosen {
		zephyr,entropy = &cryptocell;
		zephyr,flash-controller = &flash_controller;
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,uart-mcumgr = &uart0;
		zephyr,bt-mon-uart = &uart0;
		zephyr,bt-c2h-uart = &uart0;
		zephyr,bt-hci = &bt_hci_ipc0;
		nordic,802154-spinel-ipc = &ipc0;
		zephyr,ieee802154 = &ieee802154;
		zephyr,ipc_shm = &sram0_shared;
		zephyr,sram = &sram0_image;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,sram-secure-partition = &sram0_s;
		zephyr,sram-non-secure-partition = &sram0_ns;
		zephyr,wifi = &wlan0;
		nordic,pm-ext-flash = &is25;
	};

	is25: is25lp064d@0 {
		compatible = "jedec,spi-nor";
		status = "okay";
		reg = < 0x0 >;
		spi-max-frequency = < 0x7a1200 >;
		jedec-id = [ 9D 60 17 ];
		size = < 0x4000000 >;
		sfdp-bfp = [ E5 20 F1 FF FF FF FF 03 44 EB 08 6B 08 3B 04 BB EE FF FF FF FF FF 00 FF FF FF 00 FF 0C 20 0F 52 10 D8 00 FF 23 72 F5 00 82 ED 04 CC 44 83 68 44 30 B0 30 B0 F7 C4 D5 5C 00 BE 29 FF F0 D0 FF FF ];
	};
}

Kconfig Settings:
In the bootloader’s .config (spi/build/spi/zephyr/.config) file, the following relevant options are set:

CONFIG_PM_EXTERNAL_FLASH_HAS_DRIVER=y
CONFIG_PM_EXTERNAL_FLASH_ENABLED=y
CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY=y
CONFIG_BOOT_MAX_IMG_SECTORS=512

These settings should address concerns about both flash accessibility and maximum image sector allocation.

# spi/build/spi/zephyr/.config

#
# NCS subsystem configurations
#
# CONFIG_PM_SINGLE_IMAGE is not set
CONFIG_PM_EXTERNAL_FLASH_HAS_DRIVER=y
CONFIG_PM_EXTERNAL_FLASH_BASE=0
CONFIG_PM_EXTERNAL_FLASH_ENABLED=y
CONFIG_PM_EXTERNAL_FLASH_PATH="/soc/peripheral@50000000/spi@9000/is25lp064d@0"
CONFIG_PM_EXTERNAL_FLASH_SIZE_BITS=67108864
CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY=y
CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
CONFIG_PM_SRAM_BASE=0x20000000
CONFIG_PM_SRAM_SIZE=0x80000
# end of Partition Manager


#
# MCUBoot settings
#
# CONFIG_SINGLE_APPLICATION_SLOT is not set
CONFIG_BOOT_IMG_HASH_ALG_SHA256_ALLOW=y
# CONFIG_BOOT_IMG_HASH_DIRECTLY_ON_STORAGE is not set
CONFIG_BOOT_IMG_HASH_ALG_SHA256=y
# CONFIG_BOOT_SIGNATURE_TYPE_NONE is not set
CONFIG_BOOT_SIGNATURE_TYPE_RSA=y
CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN=2048
# CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256 is not set
# CONFIG_BOOT_SIGNATURE_TYPE_ED25519 is not set
CONFIG_MCUBOOT_CLEANUP_ARM_CORE=y
# CONFIG_MCUBOOT_CLEANUP_RAM is not set
CONFIG_MBEDTLS=y
# CONFIG_NRF_SECURITY is not set
CONFIG_MBEDTLS_CFG_FILE="mcuboot-mbedtls-cfg.h"
# CONFIG_BOOT_HW_KEY is not set
CONFIG_BOOT_VALIDATE_SLOT0=y
CONFIG_BOOT_PREFER_SWAP_MOVE=y
# CONFIG_BOOT_SWAP_USING_SCRATCH is not set
# CONFIG_BOOT_UPGRADE_ONLY is not set
CONFIG_BOOT_SWAP_USING_MOVE=y
# CONFIG_BOOT_DIRECT_XIP is not set
# CONFIG_BOOT_RAM_LOAD is not set
# CONFIG_BOOT_FIRMWARE_LOADER is not set
# CONFIG_BOOT_BOOTSTRAP is not set
CONFIG_BOOT_ENCRYPTION_SUPPORT=y
# CONFIG_BOOT_ENCRYPT_IMAGE is not set
# CONFIG_BOOT_MAX_IMG_SECTORS_AUTO is not set
CONFIG_BOOT_MAX_IMG_SECTORS=512
CONFIG_BOOT_SHARE_BACKEND_DISABLED=y
# CONFIG_BOOT_SHARE_BACKEND_EXTERNAL is not set
CONFIG_BOOT_FIH_PROFILE_OFF=y

Please let me know if you spot anything I might have missed or if you have any additional suggestions. Again thank you for your support!

Best regards,