Issue on SX128X using nRF Connect SDK 3.0.0

[Luis Santos]

Hello everyone,

I'm developing an application using the SX128x radio with the LoRaWAN Basic Modem.

The project runs successfully on a custom board based on the nRF5340 using nRF Connect SDK v2.9.0.

Now, I'm migrating to use nRF Connect SDK v3.0.0.

However, when running the same code with SDK v3.0.0, no SPI activity is observed on the oscilloscope—it's completely silent.

I currently use SPI0. No LOG Erros from spi API or spi device was showed. The spi code:

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/*!

* \file smtc_hal_spi.c

*

* \brief SPI Hardware Abstraction Layer implementation

*

*/

#include <stdbool.h>

#include <stdint.h>

#include <string.h>

#include <soc.h>

#include <zephyr/kernel.h>

#include <zephyr/types.h>

#include <zephyr/device.h>

#include <zephyr/logging/log.h>

#include <zephyr/drivers/gpio.h>

#include <zephyr/drivers/spi.h>

#include "smtc_hal_spi.h"

#include "smtc_hal_mcu.h"

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/*!
* \file      smtc_hal_spi.c
*
* \brief     SPI Hardware Abstraction Layer implementation
*
*/

#include <stdbool.h>
#include <stdint.h>
#include <string.h>

#include <soc.h>
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#include <zephyr/device.h>
#include <zephyr/logging/log.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/spi.h>

#include "smtc_hal_spi.h"
#include "smtc_hal_mcu.h"
#include "smtc_hal_dbg_trace.h"

LOG_MODULE_REGISTER(smtc_hal_spi, LOG_LEVEL_INF);

#define SPIOP SPI_WORD_SET(8) | SPI_TRANSFER_MSB

const struct spi_dt_spec spi_radio = SPI_DT_SPEC_GET(DT_NODELABEL(sx1280), SPIOP, 0);

static int err;

void hal_spi_init(void) {
    err = spi_is_ready_dt(&spi_radio);
    if (!err) {
        SMTC_HAL_TRACE_ERROR("Error: SPI device is not ready, err: %d", err);
    }
}

void hal_spi_de_init(void) {
    err = spi_release(&spi_radio, &spi_radio.config);
    if (err) {
        SMTC_HAL_TRACE_ERROR("Error: SPI device release failed, err: %d", err);
    }
}

void hal_spi_out(uint8_t* txBuffer, uint16_t size) {
    struct spi_buf tx_spi_buf = {.buf = txBuffer, .len = size};
    struct spi_buf_set tx_spi_buf_set = {.buffers = &tx_spi_buf, .count = 1};

    err = spi_write_dt(&spi_radio, &tx_spi_buf_set);
    if (err < 0) {
        SMTC_HAL_TRACE_ERROR("spi_write_dt() failed, err: %d", err);
    }
}

void hal_spi_in_out(uint8_t* txBuffer, uint16_t txBuffer_size, uint8_t* rxBuffer, uint16_t rxBuffer_size) {
    struct spi_buf tx_spi_buf = {.buf = txBuffer, .len = txBuffer_size};
    struct spi_buf_set tx_spi_buf_set = {.buffers = &tx_spi_buf, .count = 1};
    struct spi_buf rx_spi_bufs = {.buf = rxBuffer, .len = rxBuffer_size};
    struct spi_buf_set rx_spi_buf_set = {.buffers = &rx_spi_bufs, .count = 1};

    err = spi_transceive_dt(&spi_radio, &tx_spi_buf_set, &rx_spi_buf_set);
    if (err < 0) {
        SMTC_HAL_TRACE_ERROR("spi_transceive_dt() failed, err: %d", err);
    }
}

My pinctrl:

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&pinctrl {

i2c1_default: i2c1_default {

group1 {

psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,

<NRF_PSEL(TWIM_SCL, 1, 3)>;

bias-pull-up;

nordic,drive-mode = <NRF_DRIVE_E0E1>;

};

};

i2c1_sleep: i2c1_sleep {

group1 {

psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,

<NRF_PSEL(TWIM_SCL, 1, 3)>;

low-power-enable;

};

};

pwm0_backlight_default: pwm0_backlight_default {

group1 {

psels = <NRF_PSEL(PWM_OUT0, 0, 31)>;

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&pinctrl {
	i2c1_default: i2c1_default {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
                    <NRF_PSEL(TWIM_SCL, 1, 3)>;
            bias-pull-up;
            nordic,drive-mode = <NRF_DRIVE_E0E1>;
		};
	};

	i2c1_sleep: i2c1_sleep {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
                    <NRF_PSEL(TWIM_SCL, 1, 3)>;
			low-power-enable;
		};
	};

	pwm0_backlight_default: pwm0_backlight_default {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 31)>;
            nordic,invert;
            bias-pull-down;
        };
    };

    pwm0_backlight_sleep: pwm0_backlight_sleep {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 31)>; 
            low-power-enable;
        };
    };

	pwm1_leds_default: pwm1_leds_default {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
            bias-pull-down;
        };
        group2 {
            psels = <NRF_PSEL(PWM_OUT1, 0, 28)>;
            bias-pull-down;
        };
    };

    pwm1_leds_sleep: pwm1_leds_sleep {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
            low-power-enable;
        };
        group2 {
            psels = <NRF_PSEL(PWM_OUT1, 0, 28)>;
            low-power-enable;
        };
    };

    pwm2_motor_default: pwm2_motor_default {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 12)>;
            nordic,invert;
            bias-pull-down;
        };
    };

    pwm2_motor_sleep: pwm2_motor_sleep {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 12)>;
            low-power-enable;
        };
    };

    pwm3_buzzer_default: pwm3_buzzer_default {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 16)>;
            nordic,drive-mode = <NRF_DRIVE_H0H1>;
            nordic,invert;
            bias-pull-down;
        };
    };

    pwm3_buzzer_sleep: pwm3_buzzer_sleep {
        group1 {
            psels = <NRF_PSEL(PWM_OUT0, 0, 16)>;
            low-power-enable;
        };
    };

    spi0_sx128x_default: spi0_sx128x_default {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,
                    <NRF_PSEL(SPIM_MOSI, 0, 0)>,
                    <NRF_PSEL(SPIM_MISO, 0, 4)>;
            bias-pull-down;
        };
    };

    spi0_sx128x_sleep: spi0_sx128x_sleep {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,
                    <NRF_PSEL(SPIM_MOSI, 0, 0)>,
                    <NRF_PSEL(SPIM_MISO, 0, 4)>;
            low-power-enable;
        };
    };

    spi3_st7789v_default: spi3_st7789v_default {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
                    <NRF_PSEL(SPIM_MOSI, 0, 30)>,
                    <NRF_PSEL(SPIM_MISO, 1, 7)>;
            bias-pull-down;
        };
    };

    spi3_st7789v_sleep: spi3_st7789v_sleep {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
                    <NRF_PSEL(SPIM_MOSI, 0, 30)>,
                    <NRF_PSEL(SPIM_MISO, 1, 7)>;
            low-power-enable;
        };
    };
};

My .dts:

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/*

* Copyright (c) 2020 Nordic Semiconductor ASA

*

* SPDX-License-Identifier: Apache-2.0

*/

/dts-v1/;

#include <nordic/nrf5340_cpuapp_qkaa.dtsi>

#include "aura_nrf5340_cpuapp-pinctrl.dtsi"

#include <zephyr/dt-bindings/input/input-event-codes.h>

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

/ {

model = "Aura NRF5340 Application";

compatible = "nordic,nrf5340-dk-nrf5340-cpuapp";

chosen {

zephyr,sram = &sram0_image;

zephyr,flash = &flash0;

zephyr,code-partition = &slot0_partition;

zephyr,sram-secure-partition = &sram0_s;

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/*
 * Copyright (c) 2020 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <nordic/nrf5340_cpuapp_qkaa.dtsi>
#include "aura_nrf5340_cpuapp-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

/ {
	model = "Aura NRF5340 Application";
	compatible = "nordic,nrf5340-dk-nrf5340-cpuapp";

	chosen {
		zephyr,sram = &sram0_image;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,sram-secure-partition = &sram0_s;
		zephyr,sram-non-secure-partition = &sram0_ns;
		zephyr,bt-hci = &bt_hci_ipc0;
		nordic,802154-spinel-ipc = &ipc0;
		zephyr,ieee802154 = &ieee802154;
		zephyr,display = &st7789v;
		zephyr,rtc = &rv_8263_c8;
	};

	mipi_dbi_st7789v {
		compatible = "zephyr,mipi-dbi-spi";
		spi-dev = <&spi3>;
        dc-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
        reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		write-only;
		#address-cells = <1>;
		#size-cells = <0>;

		st7789v: st7789v@0 {
			compatible = "sitronix,st7789v";
			mipi-max-frequency = <8000000>;
			reg = <0>;
			width = <240>;
			height = <240>;
			x-offset = <80>;
			y-offset = <0>;
			vcom = <0x19>;
			gctrl = <0x35>;
			vrhs = <0x12>;
			vdvs = <0x20>;
			mdac = <0xA0>;
			gamma = <0x01>;
			colmod = <0x05>;
			lcm = <0x2c>;
			porch-param = [0c 0c 00 33 33];
			cmd2en-param = [5a 69 02 01];
			pwctrl1-param = [a4 a1];
			pvgam-param = [D0 04 0D 11 13 2B 3F 54 4C 18 0D 0B 1F 23];
			nvgam-param = [D0 04 0C 11 13 2C 3F 44 51 2F 1F 1F 20 23];
			ram-param = [00 F0];
			rgb-param = [CD 08 14];
			// mipi-mode = <MIPI_DBI_MODE_SPI_4WIRE>;
			mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE";
		};
	};

	gpio_fwd: nrf-gpio-forwarder {
		compatible = "nordic,nrf-gpio-forwarder";
		status = "okay";
		// uart {
		// 	//gpios = <&gpio1 1 0>, <&gpio1 0 0>, <&gpio0 11 0>, <&gpio0 10 0>;
		// };
		/* Forward pins for NORA-B12 FEM */
		norab12fem {
			gpios = <&gpio1 8 0>, <&gpio1 9 0>;
		};
	};

	pwmleds {
		compatible = "pwm-leds";
		backlight: backlight {
			pwms = <&pwm0 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
			label = "backlight";
		};

		led_red: led_red {
            pwms = <&pwm1 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
            label = "led_red";
        };
        led_blue: led_blue {
            pwms = <&pwm1 1 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
            label = "led_blue";
        };

		motor: motor {
			pwms = <&pwm2 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
			label = "motor";
		};

		buzzer: buzzer {
			pwms = <&pwm3 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
			label = "buzzer";
		};
	};

	pins_io {
		compatible = "gpio-keys";
		key1: key1 {
			gpios = <&gpio1 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
			label = "key1";
			zephyr,code = <INPUT_KEY_0>;
		};

		en_motor: en_motor {
			gpios = <&gpio0 8 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
			label = "en_motor";
			zephyr,code = <INPUT_KEY_0>;
		};
	};	

	zephyr,user {
		io-channels = <&adc 5>;
		bq24040-gpios = <&gpio0 24 0>;
	};

	aliases {
		watchdog0  = &wdt0;
	};

};

&vregmain {
	regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};

&vregradio {
	regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};

&vregh {
	status = "okay";
};

&adc {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	channel@5 {
		reg = <5>;
		zephyr,gain = "ADC_GAIN_1_2";
		zephyr,reference = "ADC_REF_INTERNAL";
		zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
		zephyr,input-positive = <NRF_SAADC_AIN5>;
		zephyr,resolution = <12>;
	};
};

&gpiote {
	status = "okay";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&i2c1 {
    status = "okay";
    compatible = "nordic,nrf-twim";
    label = "I2C_1";
    pinctrl-0 = <&i2c1_default>;
    pinctrl-1 = <&i2c1_sleep>;
    pinctrl-names = "default", "sleep";
    zephyr,concat-buf-size = <128>;

	rv_8263_c8: rv-8263-c8@51 {
        compatible = "microcrystal,rv-8263-c8";
        reg = <0x51>;
        status = "okay";
        clkout = <0>;
        int-gpios = <&gpio1 0 (GPIO_PULL_UP)>;
    };

    bmi270: bmi270@68 {
        compatible = "bosch,bmi270";
        reg = <0x68>;
        irq-gpios = <&gpio0 20 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
        // invert-x;
        // invert-y;
    };
};

&pwm0 {
	status = "okay";
	pinctrl-0 = <&pwm0_backlight_default>;
	pinctrl-1 = <&pwm0_backlight_sleep>;
	pinctrl-names = "default", "sleep";
};

&pwm1 {
    status = "okay";
    pinctrl-0 = <&pwm1_leds_default>;
    pinctrl-1 = <&pwm1_leds_sleep>;
    pinctrl-names = "default", "sleep";
};

&pwm2 {
    status = "okay";
    pinctrl-0 = <&pwm2_motor_default>;
    pinctrl-1 = <&pwm2_motor_sleep>;
    pinctrl-names = "default", "sleep";
};

&pwm3 {
    status = "okay";
    pinctrl-0 = <&pwm3_buzzer_default>;
    pinctrl-1 = <&pwm3_buzzer_sleep>;
    pinctrl-names = "default", "sleep";
};

&spi0 {
	compatible = "nordic,nrf-spim";
	status = "okay";
	cs-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
	overrun-character = <0x00>;
	pinctrl-0 = <&spi0_sx128x_default>;
	pinctrl-1 = <&spi0_sx128x_sleep>;
	pinctrl-names = "default", "sleep";

	sx1280: sx1280@0 {
		compatible = "semtech,sx1262";
		status = "okay";
		reg = <0x0>;
		spi-max-frequency = <1000000>;
		reset-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
		busy-gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
		dio1-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
	};
};

&spi3 {
	compatible = "nordic,nrf-spim";
	status = "okay";
	cs-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&spi3_st7789v_default>;
	pinctrl-1 = <&spi3_st7789v_sleep>;
	pinctrl-names = "default", "sleep";
};

&ieee802154 {
	status = "okay";
};

zephyr_udc0: &usbd {
	compatible = "nordic,nrf-usbd";
	status = "okay";
};

&qspi {
	status = "disabled";
};

&nfct {
	status = "disabled";
};

/* Include default memory partition configuration file */
#include <common/nordic/nrf5340_cpuapp_partition.dtsi>

Has anyone experienced a similar issue or can offer guidance on this behavior?

Thanks a lot in advance!

[runsiv]

Hi

Are you using a DK? If so then you need to set the config option CONFIG_NFCT_PINS_AS_GPIOS=Y as the pins are used for NFC on the DK

Regards

Runar

[Luis Santos]

No. I'm using a custom board with SPI on:

spi0_sx128x_default: spi0_sx128x_default {

group1 {

psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,

<NRF_PSEL(SPIM_MOSI, 0, 0)>,

<NRF_PSEL(SPIM_MISO, 0, 4)>;

bias-pull-down;

};

};

spi0_sx128x_sleep: spi0_sx128x_sleep {

group1 {

psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,

<NRF_PSEL(SPIM_MOSI, 0, 0)>,

<NRF_PSEL(SPIM_MISO, 0, 4)>;

low-power-enable;

};

};

I already using this macro CONFIG_NFCT_PINS_AS_GPIOS

[runsiv]

My mistake. I was a bit to haste when looking at your pins. 

Remember SPIM should use a dedicated clock pin pr Pin assignments

I would like to see your overlay for the 54L15 and your prj.conf

The atteched .dts shows has includes to the 5340 so I can't be sure regarding that file. 

Also there is no spi0 on the 54l15. Are you refeering to SPIM00?

Runar

[Luis Santos]

I apologize for the confusion. Although I plan to use the nRF54L15 in my future project, right now I’m adapting my existing code—originally developed for a custom nRF5340 board running nRF Connect SDK 2.9.0—to nRF Connect SDK 3.0.0. While the application works perfectly under SDK 2.9.0, after upgrading to SDK 3.0.0 I no longer see any SPI0 activity on the oscilloscope.

[runsiv]

Haha no worries. I would still like the overlay and the prj.conf. 

You can for the moment ignore everything I have written regarding pins as it would not be relevant for the 5340

Regards

Runar

[Luis Santos]

haha ok.

my custom _defconfig:

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# SPDX-License-Identifier: Apache-2.0

# Enable MPU

CONFIG_ARM_MPU=y

# Enable hardware stack protection

CONFIG_HW_STACK_PROTECTION=y

# Enable TrustZone-M

CONFIG_ARM_TRUSTZONE_M=y

# enable GPIO

CONFIG_GPIO=y

CONFIG_SPI=y

# Enable uart driver

CONFIG_SERIAL=y

# enable console

CONFIG_CONSOLE=y

CONFIG_UART_CONSOLE=y

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# SPDX-License-Identifier: Apache-2.0

# Enable MPU
CONFIG_ARM_MPU=y

# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y

# Enable TrustZone-M
CONFIG_ARM_TRUSTZONE_M=y

# enable GPIO
CONFIG_GPIO=y
CONFIG_SPI=y

# Enable uart driver
CONFIG_SERIAL=y

# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

# Clock
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=n
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n
CONFIG_SOC_ENABLE_LFXO=n
CONFIG_NORDIC_QSPI_NOR=n

# NFC
CONFIG_NFCT_PINS_AS_GPIOS=y

# BMI270
CONFIG_SENSOR=y
CONFIG_BMI270=y
CONFIG_I2C=y
CONFIG_LOG=y
CONFIG_SENSOR_LOG_LEVEL_DBG=y
CONFIG_I2C_LOG_LEVEL_DBG=y
CONFIG_RTC_LOG_LEVEL_DBG=y

my prj.conf:

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# Enable logging and RTT DEBUG output

CONFIG_LOG=y

CONFIG_LOG_MODE_IMMEDIATE=y

CONFIG_USE_SEGGER_RTT=y

CONFIG_LOG_BACKEND_RTT=y

CONFIG_LOG_PRINTK=y

CONFIG_LOG_MODE_DEFERRED=n

CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=64

CONFIG_LOG_BUFFER_SIZE=4096

CONFIG_LOG_BACKEND_RTT_BUFFER_SIZE=4096

CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=4096

# LVGL

CONFIG_MAIN_STACK_SIZE=4096

CONFIG_LV_Z_MEM_POOL_SIZE=40000

CONFIG_DISPLAY=y

CONFIG_ST7789V=y

CONFIG_ST7789V_RGB565=y

CONFIG_LVGL=y

# CONFIG_LV_CONF_MINIMAL=y

# CONFIG_LV_USE_ARC=y

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# Enable logging and RTT DEBUG output
CONFIG_LOG=y
CONFIG_LOG_MODE_IMMEDIATE=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_RTT=y
CONFIG_LOG_PRINTK=y
CONFIG_LOG_MODE_DEFERRED=n
CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=64
CONFIG_LOG_BUFFER_SIZE=4096
CONFIG_LOG_BACKEND_RTT_BUFFER_SIZE=4096
CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=4096

# LVGL
CONFIG_MAIN_STACK_SIZE=4096
CONFIG_LV_Z_MEM_POOL_SIZE=40000
CONFIG_DISPLAY=y
CONFIG_ST7789V=y
CONFIG_ST7789V_RGB565=y
CONFIG_LVGL=y
# CONFIG_LV_CONF_MINIMAL=y
# CONFIG_LV_USE_ARC=y
# CONFIG_LV_USE_BAR=y
# CONFIG_LV_USE_LABEL=y
# CONFIG_LV_USE_IMG=y
# CONFIG_LV_USE_TEXTAREA=y
# CONFIG_LV_USE_THEME_DEFAULT=y

# Font
CONFIG_LV_FONT_MONTSERRAT_18=y
CONFIG_LV_FONT_MONTSERRAT_20=y
CONFIG_LV_FONT_MONTSERRAT_24=y
CONFIG_LV_FONT_MONTSERRAT_30=y
CONFIG_LV_FONT_MONTSERRAT_48=y
CONFIG_LV_COLOR_DEPTH_16=y
CONFIG_LV_COLOR_16_SWAP=y

# Debug
CONFIG_DEBUG_THREAD_INFO=y
CONFIG_DEBUG=y
CONFIG_DEBUG_OPTIMIZATIONS=y

# MIPI
CONFIG_MIPI_DBI=y

CONFIG_PWM=y
CONFIG_PWM_NRFX=y
CONFIG_LED=y
CONFIG_GPIO=y
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096

# SPI
CONFIG_SPI=y

# RTC
CONFIG_RTC=y
CONFIG_RTC_RV8263=y
CONFIG_RTC_ALARM=y
CONFIG_RTC_UPDATE=y
CONFIG_RTC_CALIBRATION=y
CONFIG_RTC_LOG_LEVEL_DBG=n
CONFIG_COUNTER=y
CONFIG_RTC_INIT_PRIORITY=90

# RNG
CONFIG_ENTROPY_DEVICE_RANDOM_GENERATOR=y
CONFIG_TEST_RANDOM_GENERATOR=y
CONFIG_ENTROPY_GENERATOR=y
CONFIG_ENTROPY_NRF5_RNG=y
CONFIG_ENTROPY_NRF5_BIAS_CORRECTION=y

# Buttons
CONFIG_GPIO=y
CONFIG_CAF_BUTTONS=y

# System
CONFIG_REBOOT=y
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096
CONFIG_THREAD_STACK_INFO=y
CONFIG_THREAD_MONITOR=y
CONFIG_THREAD_NAME=y

# Watchdog
CONFIG_WATCHDOG=y
CONFIG_WDT_NRFX=y

# BMI270
CONFIG_I2C=y
CONFIG_SENSOR=y
CONFIG_BMI270=y

# ADC
CONFIG_ADC=y

My custom .pinctrl and custom.dts was on first message.

[runsiv]

Out of curriosty is there anything else that is not working in your application? For I don't see anything that stands out. 

CONFIG_SOC_ENABLE_LFXO=n has been deprecated in NCS 3.0 and you should set this in the devicetree like you see here and here

Regards

Runar