Can't get RTT working on L15 using J-Link Plus.

I can flash the chip. I can run the debugger. I can go to the connected devices, select the device, go to the little "plug" symbol on the RTT, and select it. That brings up a window asking me to select a device. I select the j-tag device, and then select the processor. It appears to work, but then when I try to run the debugger, I get this:

[00:00:00.390,843] <inf> eeprom_drvr: EEPROM initialized
[00:00:00.391,242] <inf> rgb_led_drvr: LED driver initialized
*** Booting nRF Connect SDK v3.0.0-3bfc46578e42 ***
*** Using Zephyr OS v4.0.99-3e0ce7636fa6 ***
[00:00:00.391,493] <inf> sp_log: Initializing Device: smartpac_l15_eval

[00:00:00.393,514] <inf> fs_nvs: 2 Sectors of 4096 bytes
[00:00:00.393,521] <inf> fs_nvs: alloc wra: 0, f10
[00:00:00.393,525] <inf> fs_nvs: data wra: 0, 120
[00:00:00.393,614] <inf> bt_sdc_hci_driver: SoftDevice Controller build revision:
c7 53 7d bc 06 12 f7 c0 b3 3a 3e 28 8e 56 1e d7 |.S}..... .:>(.V..
a0 be 95 b0 |....
[00:00:00.395,368] <inf> bt_hci_core: HW Platform: Nordic Semiconductor (0x0002)
[00:00:00.395,386] <inf> bt_hci_core: HW Variant: nRF54Lx (0x0005)
0m
m

And then nothing else. A colleague has repeated the process, and the RTT works fine on their system. I'm running nrfutil-device 2.11.0. The nRF connect toolchain and SDK are both 3.0.

Any thoughts?

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  • Hi

    I think you might be looking in the wrong place here. The RTT terminal in VS Code selects a generic M33 as the target in the gdb server, and needs to be changed to nRF54L15. Here are some images:

    Best regards,

    Simon

  • Hi Simon,

    We've discovered more information. The location of the RTT seems to shift around from the Boot loader to the Core. Here's a snapshot of the mcuboot and core map files. It appears that something is adding nrf_kmu_reserved_push_area to the core version, which is causing the RTT memory area to get remapped.

    We are able to use J-Link RTT Viewer to explicitly set the RTT memory, but we have to disconnect and reconnect each time we run in order to get it to work. I haven't figured out a way to make it work in the nRF Connect IDE.

    Please advise.

Reply
  • Hi Simon,

    We've discovered more information. The location of the RTT seems to shift around from the Boot loader to the Core. Here's a snapshot of the mcuboot and core map files. It appears that something is adding nrf_kmu_reserved_push_area to the core version, which is causing the RTT memory area to get remapped.

    We are able to use J-Link RTT Viewer to explicitly set the RTT memory, but we have to disconnect and reconnect each time we run in order to get it to work. I haven't figured out a way to make it work in the nRF Connect IDE.

    Please advise.

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