I have a NRF9160 design with a TPS63031 regulator providing 3.3v. When my battery gets weak I am seeing spontaneous reboots, likely due to input voltage droop.
I'm experimenting with adding significant (100-200uf) of input capacitance to try and ride through the peaks but my Power Profiler 2 (PP2) is recording significantly more power draw as I increase input capacitance.
The TI Performing Accurate PFM Mode Efficiency Measurements (Rev. A) application note says that 'large' input cap is needed to correctly measure efficiency in PWF (skip mode) vs PWM mode and suggests adding capacitance will increase measured efficiency by 15%. When I add 47uf, 100uf, or 200uf of ceramic capacitance my PP2 idle current measurements jump orders of magnitude.
Powering my device from the PP2 set to 3.1v., the PP2 measured 1.03 Coulombs during the first minute after power on and 5.1uA while idle with the modem off.
When I added a 47uf MLC cap that jumped to 2.6 Coulombs in the first minute and 215uA idle current.
In another test\configuration I measured 0.96 Coulombs/minute and 5uA idle with no capacitance.
When I added a 2x200 MLC caps that jumped to 3.08 Coulombs/minute and 723uA idle current
If I add capacitance to the 3.3v output of the TPS63031 (VS the input) it doesn't affect the PP2 reported power substantially.
I can't think of an explanation for the drastic power increase reported by the PP2 when input capacitance is added and I don't know if it really changed the power consumption or just what PP2 reported. Can anyone offer an explanation?