Incorrect first bit on MOSI during SPI transfer (nRF54L15, Mode 0, prescaler > 2)

Hello,

I'm developing with an nRF54L15 Revision 1 (QFAA-B00). I'm encountering a problem described in the errata:
3.4 [8] SPIM: Wrong data is transmitted on MOSI
(Symptom: When SPIM is used with CPHA=0, prescaler > 2, and the first bit to transmit is '1', the data on MOSI is incorrect).

I am using Zephyr (nRF Connect SDK v3.0.2) and the SPI API (spi_transceive_dt() from <zephyr/drivers/spi.h>).

I have confirmed that the workaround is executed:
USE_WORKAROUND_FOR_ANOMALY_NRF54L_8_NRF54H_212 is defined in the NRFX driver (nrfx_spim.c), and the code performs the actions described in the errata:
- Sets CSNDUR to (prescaler / 2 + 1)
- Writes 0x82 to the SPIM register at offset 0xc84 before starting the transfer
- Resets this register to 0x00 after EVENTS_STARTED

However, even with this workaround active, the first bit problem persists:
- On the oscilloscope, the MOSI line only transitions to ‘1’ on the rising edge of SCK instead of being centered between clock edges
- As a result, the slave samples the wrong value for the first bit if it is ‘1’.
- This behavior only affects the first 8-bit word after each CSN (SS) activation, and only if the first bit is '1'.

My configuration:
- Custom board, nRF54L15 Revision 1 (QFAA-B00), also tested with Engineering B (QFAA-BB0) – same issue
- SPI frequency: 2 MHz (prescaler = 64)
- SPI mode 0 (CPOL=0, CPHA=0)
- Using instance SPIM00
- Zephyr nRF Connect SDK v3.0.2

Oscilloscope captures:

The first bit transitions to ‘1’ on the rising edge of SCK instead of being centered between clock edges
 


Can you confirm if anything else is required on the application (or configuration) side to ensure the workaround is fully effective when using Zephyr’s SPI API? Are there any known limitations or further steps to handle this errata in this context?


Thank you for your support,

Baptiste
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  • Hi

    So I've been trying to build the project you shared here on NCS v3.0.0 (with the nRF54L15 DK as board target), but it seems to fail in build time, but I'm running into a lot of issues with undeclared and undefined, so if you can either give me a projects that builds, instructions on how to get this project to build or a .hex file that flashes and reproduces this onto a DK I can hopefully reproduce this. Before then I don't have much to provide here I'm afraid.

    Best regards,

    Simon

  • Hi Simon,

    I forgot to mention, but don’t forget the overlay in the build, I think that’s what’s causing these errors:

    west build --pristine --board nrf54l15dk/nrf54l15/cpuapp --sysbuild -- -DCONF_FILE="prj.conf" -DDTC_OVERLAY_FILE="boards/nrf54l15pdk_nrf54l15_cpuapp_spi.overlay"

    On my side it builds on an nrf54l15dk with NCS v3.0.0.

    Attached is the .hex file for an nrf54l15dk with NCS v3.0.0.

    Best regards,

    Baptiste

    8625.merged.hex

  • Hey again

    Sorry about the continued delayed replies. I tried your .hex file today, but before taking it to an oscilloscope, this doesn't even seem to be able to initialize the nrfx_spim driver and returns the following error, so I've still not been able to reproduce it I'm afraid.

    *** Booting nRF Connect SDK v3.0.0-3bfc46578e42 ***
    *** Using Zephyr OS v4.0.99-3e0ce7636fa6 ***
    [00:00:00.002,127] <err> spi_nrfx_spim: Failed to initialize nrfx driver: 0bad0004
    [00:00:00.002,132] <err> spi: SPI transceive failed (err -5)

    Best regards,

    Simon

Reply
  • Hey again

    Sorry about the continued delayed replies. I tried your .hex file today, but before taking it to an oscilloscope, this doesn't even seem to be able to initialize the nrfx_spim driver and returns the following error, so I've still not been able to reproduce it I'm afraid.

    *** Booting nRF Connect SDK v3.0.0-3bfc46578e42 ***
    *** Using Zephyr OS v4.0.99-3e0ce7636fa6 ***
    [00:00:00.002,127] <err> spi_nrfx_spim: Failed to initialize nrfx driver: 0bad0004
    [00:00:00.002,132] <err> spi: SPI transceive failed (err -5)

    Best regards,

    Simon

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