NRF5340DK unable to control few GPIOs

[Surya Thanush]

Hi 

we are developing a prototype with NRF5340DK, for which we needed to control few set of GPIOs.

we wrote our code in the assumption that it's pretty straight forward and found that the GPIOs are not toggling.
So we made a firmware just to toggle the defined GPIOs for every 1 seconds (as simple as it is)

these are following GPIOs defined to toggle
P0.28
P0.22
P0.23
P0.14
P0.13
P0.15
P0.16
P0.17

our observation,
only P0.28 is toggling as expected
P0.22 is always high and all other Pins are just low all the time

Below is our code

#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/sys/printk.h>

// Helper macro to define pin with controller + number
#define PIN_DEF(port_label, pin_num) \
    { .port = DEVICE_DT_GET(DT_NODELABEL(port_label)), \
      .pin = pin_num, \
      .dt_flags = GPIO_OUTPUT_INACTIVE }

static const struct gpio_dt_spec my_pins[] = {
    PIN_DEF(gpio0, 28), // P0.28
    PIN_DEF(gpio0, 22), // P0.22
    PIN_DEF(gpio0, 18), // P0.23
    PIN_DEF(gpio0, 14), // P0.14
    PIN_DEF(gpio0, 13), // P0.13
    PIN_DEF(gpio0, 15), // P0.15
    PIN_DEF(gpio0, 16), // P0.16
    PIN_DEF(gpio0, 17), // P0.17

};

void main(void)
{
    int ret;

    printk("Configuring pins...\n");

    // Configure pins
    for (int i = 0; i < ARRAY_SIZE(my_pins); i++) {
        if (!device_is_ready(my_pins[i].port)) {
            printk("Port not ready for pin %d\n", my_pins[i].pin);
            return;
        }

        ret = gpio_pin_configure_dt(&my_pins[i], GPIO_OUTPUT_INACTIVE);
        if (ret < 0) {
            printk("Error configuring P0.%d\n", my_pins[i].pin);
            return;
        }

        printk("Configured P0.%d\n", my_pins[i].pin);
    }

    // Toggle sequentially
    while (1) {
        for (int i = 0; i < ARRAY_SIZE(my_pins); i++) {
            // Toggle pin
            gpio_pin_toggle_dt(&my_pins[i]);
        }
        // Delay before next pin toggle
        k_sleep(K_SECONDS(1));
    }
}

Below is our Proj.conf

CONFIG_GPIO=y

# General config
CONFIG_LOG=y
# CONFIG_LOG_DEFAULT_LEVEL=4
CONFIG_PRINTK=y

# declare 32KHz crystal is Internal RC
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK=y

# I2C
CONFIG_I2C=y
CONFIG_NRFX_TWIM1=y

we didnot use any specific devicetree seperately
we configured the project for NRF5340DK_CPUAPP (secure)
Zephyr, NRF SDK 2.6.1

Regards
Surya Thanush

[Kazi Afroza Sultana]

Hello Surya,

The reasons of seeing ''only P0.28 is toggling as expected
P0.22 is always high and all other Pins are just low all the time'' is related to the pins you assigned. P0.15, P0.16, P0.17 are used as external flash. 

[Surya Thanush]

Hi Kazi Afroza sultana,

thanks for clarifying,

so as per the NRF5340DK schematics, the following pins are use as below,
P0.28 : on board LED
P0.22 : UART_2_RxD
P0.18 : Ext. Memory CS
P0.14 : Ext. Memory SIO_1/SO
P0.13 : Ext. Memory SIO_0/SI
P0.15 : Ext. Memory SIO_2/WP
P0.16 : Ext. Memory SIO_3/HOLD
P0.17 : Ext. Memory SCLK

so, makes sense that P0.28 is only working/Toggling as expected because other pins defined are used for other purposes.

So we would like to know the below,
How to disable them from the default options and make them available for GPIO actions ?

Regards
Surya Thanush

[Turbo J]

You make a device tree overlay file for your project. There you can change how peripherials and pins are assigned.

[Surya Thanush]

Hi Turbo, 

thanks for the suggestion.

i'm new to NRF SDK, so asking this,

will creating a new/extra overlay for the project overwrite the default pin configurations present in NRF5340DK default Overlay ?

[Kazi Afroza Sultana]

Hello,

Yes. Overlays you add to your application take precedence and can overwrite the board’s default pin settings, provided they are applied later in the overlay resolution order.

You can read the following devacademy link 

https://academy.nordicsemi.com/courses/nrf-connect-sdk-fundamentals/lessons/lesson-2-reading-buttons-and-controlling-leds/ 

to learn how devicetree works.