Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

I'm using the board RAK19007 with its RAK4630 nrf52840, meant for solar and battery, where the AIN3 (P0.05) comes from a voltage divider of VBAT, where AIN3 = VBAT*(1.5M/2.5M). The Thevenin equivalent resistor should be 600KOhm.

The nrf52840 is powered in High Voltage mode, where VDDH=VBAT. I noticed that VDD=MAX(3v3,VDDH) with a multimeter. We use the default LDO in regulators; I tried using the DC/DC converters but I cannot observe any difference.

I'm telling the system to go off (sd_power_system_off()) when VBAT < 3.1V (using ADC read in AIN3), but before system off, I program LPCOMP like this:

        nrf_lpcomp_config_t c;
        /* We have AIN3 with a VBAT divider so AIN3 = VBAT * (1.5/2.5)
         * We have the device going deep sleep under 3.1V, which is AIN3 = 1.86V
         * So we can wake up when VBAT>=VDD is restored to 3.3V, where AIN3 = 1.98V
         * 1.98/3.3 = 6/10, but that's close to the VBAT divider, so we
         * pick 6/8VDD, which means VBAT=4.1V */
        c.reference = NRF_LPCOMP_REF_SUPPLY_6_8;
        c.detection = NRF_LPCOMP_DETECT_UP;
        c.hyst = NRF_LPCOMP_HYST_NOHYST;
        nrf_lpcomp_configure(NRF_LPCOMP, &c);
        nrf_lpcomp_input_select(NRF_LPCOMP, NRF_LPCOMP_INPUT_3); // RAK4630 AIN0 = nrf52840 AIN3 = Pin 5
        nrf_lpcomp_enable(NRF_LPCOMP);
        
        /* Disable RAM retention in System OFF, otherwise the
         * system does not reboot well, part of config reset */
        for(int i=0; i < 9; ++i)
        {
            nrf_power_rampower_mask_off(NRF_POWER, i,
                    NRF_POWER_RAMPOWER_S0RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S1RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S2RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S3RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S4RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S5RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S7RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S8RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S9RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S10RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S11RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S12RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S13RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S14RETENTION_MASK |
                    NRF_POWER_RAMPOWER_S15RETENTION_MASK
                    );
        }

        auto ok = sd_power_system_off();

I would expect that if I set VBAT=2.5V for example (with a regulable power supply), the system will go off. It does, but it reboots immediately. It reboots, then goes off, then reboots, then goes off, ...

I checked that it has to be the LPCOMP resetting the system, because if I don't program LPCOMP the system never resets.

Why LPCOMP does wake the device up immediately after SystemOff?

VBAT=VDD=2.5V, that means that AIN3 = 1.5V < 6/8*VDD = 1.875V, set in LPCOMP. The ANADETECT signal should not be triggered.

Is there a problem with the high resistance of the voltage divider? Is there something I wrote wrong?

In another test I changed the LPCOMP input to AIN7, which is Not Connected to anywhere, and it also reboots automatically.

Parents
  • What battery do you use? Many LiPo can't supply enough power when they go below ~3.0Volts. You might be triggering BOR/POR - check voltages with an oscilloscope.

    High ohms input can work as an antenna. Make sure that you have a properly sized capacitor on it...

  • By now I'm checking with a lab regulable voltage supply, choosing the voltage I want in VBAT. The device will have a Li-Ion battery and specifically I want to go System-Off long before it reaches BOR, because in BOR all hangs forever.

    I think I found an important surprise with the oscilloscope on VDD (generated by REG0) testing the systemoff->wakeup. As for AIN3 (the high ohm resistors) I cannot see any oscillation at all with the oscilloscope.

    VDD seems to go down at some moment related to the SystemOff->reboot. I don't have any other time reference to the event.

    If I don't enable the LPCOMP I see a longer pause yet it reboots as well. Strange.

    I don't know why the device restarts with LPCOMP disabled.

    I also don't know why VDD=3V3, if I am not setting this up; I read that the default should be 1.8V from the REG0. And I don't understand why it falls to 1.62V (from the oscilloscope pictures).

    I have to mention that apparently the same code yesterday had a good LPCOMP restart, but today it is restarting apparently no matter what, and I don't know why.

  • I checked the NRESET pin and it has the same shape  as VDD, so I guess some part of the circuit is pulling NRESET down. That is the piece that is disturbing in my setup I think. I will have to find this out.

    Yellow=NRESET, Blue=VDD

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