Correct way to configure 3-wire SPI in nRF Connect SDK

[BertL]

We are developing a board with an nRF54L15 module that interfaces with a SPI device. We want to use 3-wire spi, so the MISO and MOSI lines are shorted (according to the datasheet of the device), and connected to a SDO port on the MCU. We don't use a SDI port. How to correctly configure 3-wire spi in the pinctrl file?

Should it be like this:

    spi20_default: spi00_default {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 1, 10)>,
                    <NRF_PSEL(SPIM_MOSI, 1, 9)>,
                    <NRF_PSEL_DISCONNECTED(SPIM_MISO)>;
        };
    };

Or like this:

    spi20_default: spi00_default {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 1, 10)>,
                    <NRF_PSEL(SPIM_MOSI, 1, 9)>,
                    <NRF_PSEL(SPIM_MISO, 1, 9))>;
        };
    };

Or something completely different?

[Jared]

Hi Bert,

If you're not going to use MISO, why can't you just leave it floating? Actually you don't really have to define it either, it's optional.

regards

Jared 

[BertL]

Thanks for your response! We use MISO, but since we only use SPI in half-duplex mode we want to save a pin by connecting the SDO pin to both MISO and MOSI on the SPI client. 

But I can confirm that it works to configure SPIM_MOSI and SPIM_MISO with the same pin, so for me everything is clear now.

[BertL]

Sorry for reopening this Thread. We first used P1 pins for this setup, and that worked properly. But we would like to switch to P2 pins on the nrf54l15 for the spi communication.

We made sure to use the designated pins, but unfortunately we don't get any response from the SPI slave anymore after switching the pins. Spi initialization doesn't give errors. Could it be that a shared MISO and MOSI isn't working on the P2 ports? Maybe because of the high-drive requirement?

This is our pinctrl config for P2:

    spi00_default: spi00_default {
        group1 {
            psels = <NRF_PSEL(SPIM_MISO, 2, 8)>;
        };
        group2 {
            psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
                    <NRF_PSEL(SPIM_MOSI, 2, 8)>;
            nordic,drive-mode = <NRF_DRIVE_E0E1>;
        };
    };

    spi00_sleep: spi00_sleep {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
                    <NRF_PSEL(SPIM_MOSI, 2, 8)>,
                    <NRF_PSEL(SPIM_MISO, 2, 8)>;
            low-power-enable;
        };
    };

[Jared]

Hi there,

I find a bit strange that this did work on P1 in the first place as the SPI drivers reconfigure the GPIO depending on if it's a MOSI or MISO. If you probe the data pins, do you see any activity from the nRF?

best regards

Jared 

[BertL]

It definitely works on P1 of the nrf54l15 and we also have this configuration (with same pin for MOSI and MISO) working on a nrf52840. 

But if I understand correctly there is no official half-duplex spi support in the nrfx drivers? So we were kind of lucky that it worked?

[Elfving]

Hi Bert, Jared is currently OOO. Are you able to wait until next week? 

Regards,

Elfving

[BertL]

That's okay! But really looking forward for an answer, as we really depend on 3-wire spi. ;)

[hmolesworth]

Here's a link for low-level 3-wire SPI code I wrote; might be worth looking over spim3-reads-with-mosi-and-miso-tied-together

[Jared]

Hi,

That is correct, the drivers are designed for SPIM to be used with dedicated MOSI and MISO lines. Note that on SPIM00 has dedicated GPIOs that it must use on P2:

SPIM00

Has dedicated pins on P2. For 32 MHz operation, the pins must be configured using extra high drive E0/E1 configuration in the DRIVE0/1 fields of the PIN_CNF GPIO register.

P2.04 SDI

P2.05 CSN

P2.06 SCK

P2.08 SDO

regards

Jared 

[BertL]

Okay clear, so 3-wire spi (with shared MOSI and MISO) will never be possible on P2. Maybe it's good to explicitly say this in the documentation?