~~~~~~~~~~Environment ~~~~~~~~~~
nrf54L15 + NCS 3.1.1 + VSCode + Win11
~~~~~~~Reproduction Steps~~~~~~~~~
1. without pm_statics.yml, with following configs (see attachment), merged.hex from prestine built can run on device successfully with DFU feature.
2. then I copied partitions.yml from build output, placed it into same folder of prj.conf, then changed its name to pm_static.yml
nothing else was changed.
in this case, prestine build still will pass, but merged.hex flashed into device will not boot system (no UART output can't be observed,)
~~~~~~~~Question ~~~~~~~~~
any fix need to be done, in order to use the auto generated partitions.yml?
~~~~~~~ Attachment ~~~~~~~~~~
1️.prj.conf
```
CONFIG_NCS_SAMPLE_MCUMGR_BT_OTA_DFU=y
CONFIG_NCS_SAMPLE_MCUMGR_BT_OTA_DFU_SPEEDUP=y
CONFIG_NCS_SAMPLE_MCUMGR_BT_OTA_DFU_VALIDATION=y
CONFIG_MCUMGR_GRP_ZBASIC_STORAGE_ERASE=n
CONFIG_BT=y
CONFIG_BT_PERIPHERAL=y
CONFIG_BT_GATT_CACHING=n
CONFIG_BT_GATT_CLIENT=y
CONFIG_BT_L2CAP_TX_MTU=247
CONFIG_BT_CTLR_DATA_LENGTH_MAX=251
CONFIG_BT_BUF_ACL_TX_SIZE=251
CONFIG_BT_BUF_ACL_RX_SIZE=251
CONFIG_BT_BUF_ACL_TX_COUNT=10
CONFIG_BT_BUF_EVT_RX_COUNT=12
CONFIG_BT_GAP_PERIPHERAL_PREF_PARAMS=y
CONFIG_BT_PERIPHERAL_PREF_MIN_INT=6
CONFIG_BT_PERIPHERAL_PREF_MAX_INT=12
CONFIG_BT_PERIPHERAL_PREF_LATENCY=0
CONFIG_BT_PERIPHERAL_PREF_TIMEOUT=400
CONFIG_NRFX_SAADC=y
CONFIG_NRFX_GPPI=y
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=8192
CONFIG_MAIN_STACK_SIZE=4096
CONFIG_ISR_STACK_SIZE=4096
CONFIG_BT_RX_STACK_SIZE=4096
CONFIG_LOG=y
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_LOG_MODE_DEFERRED=y
CONFIG_LOG_BACKEND_UART=y
CONFIG_LOG_BACKEND_FORMAT_TIMESTAMP=y
CONFIG_LOG_BUFFER_SIZE=4096
CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=8192
CONFIG_CBPRINTF_FP_SUPPORT=y
CONFIG_FPU=y
CONFIG_MULTITHREADING=y
CONFIG_NUM_COOP_PRIORITIES=16
CONFIG_NUM_PREEMPT_PRIORITIES=15
CONFIG_SPI=y
CONFIG_GPIO=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_LOG_PRINTK=n
CONFIG_CMSIS_DSP=y
CONFIG_CMSIS_DSP_BASICMATH=y
CONFIG_CMSIS_DSP_STATISTICS=y
CONFIG_CMSIS_DSP_TRANSFORM=y
CONFIG_CMSIS_DSP_FILTERING=y
CONFIG_CMSIS_DSP_COMPLEXMATH=y
CONFIG_DSP=y
CONFIG_THREAD_NAME=y
CONFIG_REBOOT=y
CONFIG_RETENTION=y
CONFIG_RETAINED_MEM=y
CONFIG_CRC=y
```
---
2️.boards/wedb54_extra.conf
```conf
CONFIG_BT_DEVICE_NAME="MY_BLE_DEVICE"
CONFIG_NRFX_TIMER20=y
CONFIG_NRFX_TIMER22=y
CONFIG_NRFX_SPIM21=y
```
---
3.boards/wedb54.overlay
```dts
&uart20 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart20_default>;
pinctrl-1 = <&uart20_sleep>;
pinctrl-names = "default", "sleep";
};
&spi00 {
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&ks_spi_default>;
pinctrl-1 = <&ks_spi_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
ks_spi: ks@0 {
compatible = "vnd,spi-device";
reg = <0>;
spi-max-frequency = <4000000>;
label = "ks_spi";
};
};
&pinctrl {
uart20_default: uart20_default {
group1 {
psels = <NRF_PSEL(UART_RX, 2, 0)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 2, 2)>;
};
};
uart20_sleep: uart20_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 2, 0)>,
<NRF_PSEL(UART_TX, 2, 2)>;
low-power-enable;
};
};
ks_spi_default: ks_spi_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MOSI, 2, 8)>,
<NRF_PSEL(SPIM_MISO, 2, 9)>;
};
};
ks_spi_sleep: ks_spi_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MOSI, 2, 8)>,
<NRF_PSEL(SPIM_MISO, 2, 9)>;
low-power-enable;
};
};
};
/ {
aliases {
pwr-on-off = &pwr_on_off_led;
det-key = &det_button;
bled = &bled;
};
ks_rst_pin: ks-rst-pin {
compatible = "nordic,gpio-pins";
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
ks_en_pin: ks-en-pin {
compatible = "nordic,gpio-pins";
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
ks_ldf_pin: ks-ldf-pin {
compatible = "nordic,gpio-pins";
gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
status = "okay";
};
pwr_on_off_pin: pwr-on-off-pin {
compatible = "gpio-leds";
status = "okay";
pwr_on_off_led: pwr_on_off_led_0 {
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
label = "Power Control";
};
};
det_key_pin: det-key-pin {
compatible = "gpio-keys";
status = "okay";
det_button: det_button_0 {
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
label = "Detection Key";
};
};
bled_pin: bled-pin {
compatible = "gpio-leds";
status = "okay";
bled: bled_0 {
gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
label = "Blue LED";
};
};
sram@2003F000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2003F000 DT_SIZE_K(4)>;
zephyr,memory-region = "RetainedMem";
status = "okay";
retainedmem {
compatible = "zephyr,retained-ram";
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
retention_log0: retention@0 {
compatible = "zephyr,retention";
status = "okay";
reg = <0x0 0x1000>;
};
};
};
chosen {
zephyr,log-retention = &retention_log0;
};
};
```
4.sysbuild\mcuboot.conf
```
CONFIG_LOG=n
CONFIG_CONSOLE=n
CONFIG_UART_CONSOLE=n
CONFIG_SERIAL=n
CONFIG_GPIO_LOG_LEVEL_OFF=y
CONFIG_BOOT_MAX_IMG_SECTORS=256
```
5.sysbuild\mcuboot.overlay
```
&uart30 {
status = "disabled";
};
&uart20 {
status = "disabled";
};
&uart00 {
status = "disabled";
};
&adc {
status = "okay";
};
```
6.sysbuild.conf
```
SB_CONFIG_BOOTLOADER_MCUBOOT=y
SB_CONFIG_BOOT_SIGNATURE_TYPE_ED25519=y
SB_CONFIG_BOOT_SIGNATURE_KEY_FILE="c:/dev_signing_key.pem"
SB_CONFIG_BOOT_ENCRYPTION=y
SB_CONFIG_BOOT_ENCRYPTION_KEY_FILE="c:/dev_encryption_key.pem"
```
7.CMakePresets.json
```
{
"version": 2,
"cmakeMinimumRequired": {
"major": 3,
"minor": 20
},
"configurePresets": [
{
"name": "build_54",
"displayName": "Build for nRF54l15 DK nRF54l15 Application",
"generator": "Ninja",
"binaryDir": "${sourceDir}/build_54",
"cacheVariables": {
"BOARD": "nrf54l15dk/nrf54l15/cpuapp",
"EXTRA_CONF_FILE": "boards/wedb54_extra.conf",
"CONF_FILE": "prj.conf",
"DTC_OVERLAY_FILE": "boards/wedb54.overlay"
}
}
]
}
```
8.auto generated partitions.yml
```
EMPTY_0:
address: 0xd800
end_address: 0xe000
placement:
after:
- mcuboot
region: flash_primary
size: 0x800
EMPTY_1:
address: 0x164000
end_address: 0x165000
placement:
after:
- mcuboot_secondary
region: flash_primary
size: 0x1000
app:
address: 0xe800
end_address: 0xb9000
region: flash_primary
size: 0xaa800
bootconf:
address: 0xffd080
end_address: 0xffd084
region: bootconf
size: 0x4
mcuboot:
address: 0x0
end_address: 0xd800
placement:
align:
end: 0x1000
before:
- mcuboot_primary
region: flash_primary
size: 0xd800
mcuboot_pad:
address: 0xe000
end_address: 0xe800
placement:
align:
start: 0x1000
before:
- mcuboot_primary_app
region: flash_primary
size: 0x800
mcuboot_primary:
address: 0xe000
end_address: 0xb9000
orig_span: &id001
- app
- mcuboot_pad
region: flash_primary
sharers: 0x1
size: 0xab000
span: *id001
mcuboot_primary_app:
address: 0xe800
end_address: 0xb9000
orig_span: &id002
- app
region: flash_primary
size: 0xaa800
span: *id002
mcuboot_secondary:
address: 0xb9000
end_address: 0x164000
placement:
after:
- mcuboot_primary
align:
start: 0x1000
align_next: 0x1000
region: flash_primary
share_size:
- mcuboot_primary
size: 0xab000
otp:
address: 0xffd500
end_address: 0xffd9fc
region: otp
size: 0x4fc
sram_primary:
address: 0x20000000
end_address: 0x2002f000
region: sram_primary
size: 0x2f000
```
