54L15 PTA coex with external wifi

hi support team,

customer is using nRF54l15 BLE with external WIFI (not 7002), currently met with problems about shared antenna.

problem is as below:

when external wifi works with tx function, grant pin is asserted, so BLE hold, but when wifi working with rx function, grant is not asserted, so antenna switched to BLE, so wifi is not working well.

so customer is considering using BLE to control antenna, however, we don't have document about the details of how PTA working,

my question is:

can request pin be used as antenna control, once request pin is high, the antenna switches to BLE, when request pin is low, antenna switches to WIFI.

in our 7002 document, there is a Figure 15 as below:

is this figure correct? if it is correct, the request lead time T1 covers the Grant timing, than request pin can be used as antenna control, right?

Regards,

William.

Parents
  • Hello William,

    in theory the approach you suggest would work, but I don't know which signals they have available and are using with the external WiFI module now? If they can block WiFi foe the duration of the BLE events and let the BLE be in charge, then it will work as you suggest.

    It might be useful to explore and understand why the grant for RX functionality isn't working if they expect that to be better way to use the setup. Are the signals they have looking and behaving as expected if they look at them with a signal analyser?

    Best regards

    Asbjørn

  • thanks Asbjorn,

    the key point is if time costs for request will cover the time of grant, i am not sure of this.

    another question is coex pins must using P0 and P1,right, P2 doesn't have GPIOTE in 54L15. or for 3 wires coex, which pin can use P2 port, whch pin can't use P2 port?

    Regards,

    William.

  • Hello William,
    You can't use P2 for the pins. P0 or P1 have to be used for the gpio based coex interface.
    William.wei said:
    the key point is if time costs for request will cover the time of grant, i am not sure of this.
    I don't understand what you mean here? Can you ellaborate a bit what your concern is?
    Best regards
    Asbjørn
  • i mean
    1.  is the timing sequence correct in this figure?

    requst pin will be held for such a long time?

    if there is a docs about the details of our PTA?


    2.  all these three pins should not use P2? which pin is gpio not gpiote?

    You can't use P2 for the pins. P0 or P1 have to be used for the gpio based coex interface

    Regards,

    William,.

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