undefined reference to `__device_dts_ord_88'

Trying to migrate from SDK v2.7.0 to v2.8.0 and suddenly getting the build error 

undefined reference to `__device_dts_ord_88'

Based on other forum posts, I was able to track down more information using the <build target>\<project>\zephyr\include\generated\zephyr\devicetree_generated.h file which lists:

 *   88  /soc/radio@40001000/bt_hci_sdc

Reading around it looks like I need to add something along the lines of 

&bt_hci_sdc {
    status = "okay";
};
to the Device Tree, but I am struggling to figure out where, which file, and the exact syntax.  So far nothing I've cobbled together based on online searching has worked.  For completeness, my environment is:

  • Windows 11
  • VS Code w/ nRF Connect plugin
  • toolchain / SDK v2.8.0
  • custom PCB using an nRF52832 in the QFAA package
  • sysbuild
  • MCUBOOT
Parents Reply Children
  • I'm still not clear on what is necessary and what isn't based on that file.  To simplify, I used the nRF Connect plugin to "Create a new board" and the files it generates do not look anything like the above.  The .dts file is just 

    /dts-v1/;
    #include <nordic/nrf52832_qfaa.dtsi>
    #include "fake_board-pinctrl.dtsi"
    
    / {
    	model = "Custom Board auto generated by nRF Connect for VS Code";
    	compatible = "generic,fake-board";
    
    	chosen {
    		zephyr,sram = &sram0;
    		zephyr,flash = &flash0;
    		zephyr,code-partition = &slot0_partition;
    	};
    };
    
    &flash0 {
    	partitions {
    		compatible = "fixed-partitions";
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		boot_partition: partition@0 {
    			label = "mcuboot";
    			reg = <0x00000000 DT_SIZE_K(48)>;
    		};
    
    		slot0_partition: partition@c000 {
    			label = "image-0";
    			reg = <0x0000c000 DT_SIZE_K(220)>;
    		};
    
    		slot1_partition: partition@43000 {
    			label = "image-1";
    			reg = <0x00043000 DT_SIZE_K(220)>;
    		};
    
    		storage_partition: partition@7a000 {
    			label = "storage";
    			reg = <0x0007a000 DT_SIZE_K(24)>;
    		};
    	};
    };

    and the .dtsi file is just 

    &pinctrl {
    };

    Neither have an "soc" section or anything even remotely similar.  Do I need to make one myself?  If yes, what is the bare minimum so I'm not enabling things I don't want/need (code size and power savings are CRITICAL in my project)?

    This is one (of many) cases where the theory all make sense, but when it comes to putting it into practice everything is clear as mud.

  • You can refer to https://github.com/nrfconnect/sdk-zephyr/blob/v3.7.99-ncs1/dts/arm/nordic/nrf52832.dtsi to add or duplicate it for your custom board.

    That is the same file that you previously linked to.  It does not look anything like either the .dts or the .dtsi files generated by the nRF connect tool.  Specifically, there is no "chosen" section in the generated .dtsi file, but there is a "chosen" section in the .dts file, but no mention of "cpus" or "soc" sections.  I tried inserting the "cpus" and "soc" sections from the github file into my .dts file immediately after the "chosen" section (similar to where it is in the Github file), and I still get the exact same build error of undefined reference to `__device_dts_ord_88'

    What exactly do I need to put (and where) in the .dts and .dts files to fix this problem?

  • I created a custom board file and built it for zephyr\samples\bluetooth\peripheral, but I cannot reproduce the issue. 

    Could you provide your custom board file?

  • Not sure how to attach a file so code is inline below.  These are based off creating a new board using the nRF Connect plugin for VS Code, then adding in bits from the older definition that used the HWMv1.  There are comment markers indicating where I cut/pasted code from the GitHub file mentioned previously.

    generic_nrf52832_v2-pinctrl.dtsi

    #include <arm/armv7-m.dtsi>
    #include <nordic/nrf_common.dtsi>
    #include <nordic/nrf52832.dtsi>
    #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
    #include <zephyr/dt-bindings/regulator/nrf5x.h>
    
    &pinctrl {
    	i2c0_default: i2c0_default {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 6)>,
    				<NRF_PSEL(TWIM_SCL, 0, 7)>;
    		};
    	};
    
    	i2c0_sleep: i2c0_sleep {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 6)>,
    				<NRF_PSEL(TWIM_SCL, 0, 7)>;
    			low-power-enable;
    		};
    	};
    
    	pwm0_default: pwm0_default {
    		group1 {
    			psels = <NRF_PSEL(PWM_OUT0, 0, 30)>;
    			nordic,invert;
    		};
    	};
    
    	pwm0_sleep: pwm0_sleep {
    		group1 {
    			psels = <NRF_PSEL(PWM_OUT0, 0, 30)>;
    			low-power-enable;
    		};
    	};
    };
    

    generic_nrf52832_v2.dts

    /dts-v1/;
    #include <nordic/nrf52832_qfaa.dtsi>
    #include "generic_nrf52832_v2-pinctrl.dtsi"
    
    / {
    	model = "Custom Board auto generated by nRF Connect for VS Code";
    	compatible = "Generic,generic-nrf52832-v2";
    
    	chosen {
    		zephyr,bt-hci = &bt_hci_sdc;
    		zephyr,sram = &sram0;
    		zephyr,flash = &flash0;
    		zephyr,code-partition = &slot0_partition;
    	};
    
    	/* COPIED FROM GITHUB START */
    	cpus {
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		cpu@0 {
    			device_type = "cpu";
    			compatible = "arm,cortex-m4f";
    			reg = <0>;
    			#address-cells = <1>;
    			#size-cells = <1>;
    
    			itm: itm@e0000000 {
    				compatible = "arm,armv7m-itm";
    				reg = <0xe0000000 0x1000>;
    				swo-ref-frequency = <32000000>;
    			};
    		};
    	};
    
    	soc {
    		ficr: ficr@10000000 {
    			compatible = "nordic,nrf-ficr";
    			reg = <0x10000000 0x1000>;
    			#nordic,ficr-cells = <1>;
    			status = "okay";
    		};
    
    		uicr: uicr@10001000 {
    			compatible = "nordic,nrf-uicr";
    			reg = <0x10001000 0x1000>;
    			status = "okay";
    		};
    
    		sram0: memory@20000000 {
    			compatible = "mmio-sram";
    		};
    
    		clock: clock@40000000 {
    			compatible = "nordic,nrf-clock";
    			reg = <0x40000000 0x1000>;
    			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		power: power@40000000 {
    			compatible = "nordic,nrf-power";
    			reg = <0x40000000 0x1000>;
    			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    			#address-cells = <1>;
    			#size-cells = <1>;
    
    			gpregret1: gpregret1@4000051c {
    				#address-cells = <1>;
    				#size-cells = <1>;
    				compatible = "nordic,nrf-gpregret";
    				reg = <0x4000051c 0x1>;
    				status = "okay";
    			};
    
    			gpregret2: gpregret2@40000520 {
    				#address-cells = <1>;
    				#size-cells = <1>;
    				compatible = "nordic,nrf-gpregret";
    				reg = <0x40000520 0x1>;
    				status = "okay";
    			};
    
    			reg: regulator@40000578 {
    				compatible = "nordic,nrf5x-regulator";
    				reg = <0x40000578 0x1>;
    				regulator-name = "REG";
    				regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
    			};
    		};
    
    		bprot: bprot@40000000 {
    			compatible = "nordic,nrf-bprot";
    			reg = <0x40000000 0x1000>;
    			status = "okay";
    		};
    
    		radio: radio@40001000 {
    			compatible = "nordic,nrf-radio";
    			reg = <0x40001000 0x1000>;
    			interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    			ble-2mbps-supported;
    
    			bt_hci_sdc: bt_hci_sdc {
    				compatible = "nordic,bt-hci-sdc";
    				status = "okay";
    			};
    			bt_hci_controller: bt_hci_controller {
    				compatible = "zephyr,bt-hci-ll-sw-split";
    				status = "disabled";
    			};
    		};
    
    		uart0: uart@40002000 {
    			/* uart can be either UART or UARTE, for the user to pick */
    			/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
    			compatible = "nordic,nrf-uarte";
    			reg = <0x40002000 0x1000>;
    			interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    		};
    
    		i2c0: i2c@40003000 {
    			/*
    			 * This i2c node can be TWI, TWIM, or TWIS,
    			 * for the user to pick:
    			 * compatible = "nordic,nrf-twi" or
    			 *              "nordic,nrf-twim" or
    			 *              "nordic,nrf-twis".
    			 */
    			compatible = "nordic,nrf-twim";
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <0x40003000 0x1000>;
    			clock-frequency = <I2C_BITRATE_STANDARD>;
    			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
    			easydma-maxcnt-bits = <8>;
    			status = "disabled";
    		};
    
    		spi0: spi@40003000 {
    			/*
    			 * This spi node can be SPI, SPIM, or SPIS,
    			 * for the user to pick:
    			 * compatible = "nordic,nrf-spi" or
    			 *              "nordic,nrf-spim" or
    			 *              "nordic,nrf-spis".
    			 */
    			compatible = "nordic,nrf-spi";
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <0x40003000 0x1000>;
    			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
    			max-frequency = <DT_FREQ_M(8)>;
    			easydma-maxcnt-bits = <8>;
    			status = "disabled";
    		};
    
    		i2c1: i2c@40004000 {
    			/*
    			 * This i2c node can be TWI, TWIM, or TWIS,
    			 * for the user to pick:
    			 * compatible = "nordic,nrf-twi" or
    			 *              "nordic,nrf-twim" or
    			 *              "nordic,nrf-twis".
    			 */
    			compatible = "nordic,nrf-twim";
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <0x40004000 0x1000>;
    			clock-frequency = <I2C_BITRATE_STANDARD>;
    			interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
    			easydma-maxcnt-bits = <8>;
    			status = "disabled";
    		};
    
    		spi1: spi@40004000 {
    			/*
    			 * This spi node can be SPI, SPIM, or SPIS,
    			 * for the user to pick:
    			 * compatible = "nordic,nrf-spi" or
    			 *              "nordic,nrf-spim" or
    			 *              "nordic,nrf-spis".
    			 */
    			compatible = "nordic,nrf-spi";
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <0x40004000 0x1000>;
    			interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
    			max-frequency = <DT_FREQ_M(8)>;
    			easydma-maxcnt-bits = <8>;
    			status = "disabled";
    		};
    
    		nfct: nfct@40005000 {
    			compatible = "nordic,nrf-nfct";
    			reg = <0x40005000 0x1000>;
    			interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    		};
    
    		gpiote: gpiote0: gpiote@40006000 {
    			compatible = "nordic,nrf-gpiote";
    			reg = <0x40006000 0x1000>;
    			interrupts = <6 5>;
    			status = "disabled";
    			instance = <0>;
    		};
    
    		adc: adc@40007000 {
    			compatible = "nordic,nrf-saadc";
    			reg = <0x40007000 0x1000>;
    			interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    			#io-channel-cells = <1>;
    		};
    
    		timer0: timer@40008000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = <0x40008000 0x1000>;
    			cc-num = <4>;
    			max-bit-width = <32>;
    			interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
    			prescaler = <0>;
    		};
    
    		timer1: timer@40009000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = <0x40009000 0x1000>;
    			cc-num = <4>;
    			max-bit-width = <32>;
    			interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
    			prescaler = <0>;
    		};
    
    		timer2: timer@4000a000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = <0x4000a000 0x1000>;
    			cc-num = <4>;
    			max-bit-width = <32>;
    			interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
    			prescaler = <0>;
    		};
    
    		rtc0: rtc@4000b000 {
    			compatible = "nordic,nrf-rtc";
    			reg = <0x4000b000 0x1000>;
    			cc-num = <3>;
    			interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    			clock-frequency = <32768>;
    			prescaler = <1>;
    		};
    
    		temp: temp@4000c000 {
    			compatible = "nordic,nrf-temp";
    			reg = <0x4000c000 0x1000>;
    			interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		rng: random@4000d000 {
    			compatible = "nordic,nrf-rng";
    			reg = <0x4000d000 0x1000>;
    			interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		ecb: ecb@4000e000 {
    			compatible = "nordic,nrf-ecb";
    			reg = <0x4000e000 0x1000>;
    			interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		ccm: ccm@4000f000 {
    			compatible = "nordic,nrf-ccm";
    			reg = <0x4000f000 0x1000>;
    			interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>;
    			length-field-length-8-bits;
    			status = "okay";
    		};
    
    		wdt: wdt0: watchdog@40010000 {
    			compatible = "nordic,nrf-wdt";
    			reg = <0x40010000 0x1000>;
    			interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		rtc1: rtc@40011000 {
    			compatible = "nordic,nrf-rtc";
    			reg = <0x40011000 0x1000>;
    			cc-num = <4>;
    			interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    			clock-frequency = <32768>;
    			prescaler = <1>;
    		};
    
    		qdec: qdec0: qdec@40012000 {
    			compatible = "nordic,nrf-qdec";
    			reg = <0x40012000 0x1000>;
    			interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    		};
    
    		comp: comparator@40013000 {
    			/*
    			 * Use compatible "nordic,nrf-comp" to configure as COMP
    			 * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP
    			 */
    			compatible = "nordic,nrf-comp";
    			reg = <0x40013000 0x1000>;
    			interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    		};
    
    		egu0: swi0: egu@40014000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = <0x40014000 0x1000>;
    			interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		egu1: swi1: egu@40015000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = <0x40015000 0x1000>;
    			interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		egu2: swi2: egu@40016000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = <0x40016000 0x1000>;
    			interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		egu3: swi3: egu@40017000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = <0x40017000 0x1000>;
    			interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		egu4: swi4: egu@40018000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = <0x40018000 0x1000>;
    			interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		egu5: swi5: egu@40019000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = <0x40019000 0x1000>;
    			interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "okay";
    		};
    
    		timer3: timer@4001a000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = <0x4001a000 0x1000>;
    			cc-num = <6>;
    			max-bit-width = <32>;
    			interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>;
    			prescaler = <0>;
    		};
    
    		timer4: timer@4001b000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = <0x4001b000 0x1000>;
    			cc-num = <6>;
    			max-bit-width = <32>;
    			interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>;
    			prescaler = <0>;
    		};
    
    		pwm0: pwm@4001c000 {
    			compatible = "nordic,nrf-pwm";
    			reg = <0x4001c000 0x1000>;
    			interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    			#pwm-cells = <3>;
    		};
    
    		pdm0: pdm@4001d000 {
    			compatible = "nordic,nrf-pdm";
    			reg = <0x4001d000 0x1000>;
    			interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    		};
    
    		flash_controller: flash-controller@4001e000 {
    			compatible = "nordic,nrf52-flash-controller";
    			reg = <0x4001e000 0x1000>;
    
    			#address-cells = <1>;
    			#size-cells = <1>;
    
    
    			flash0: flash@0 {
    				compatible = "soc-nv-flash";
    				erase-block-size = <4096>;
    				write-block-size = <4>;
    			};
    		};
    
    		ppi: ppi@4001f000 {
    			compatible = "nordic,nrf-ppi";
    			reg = <0x4001f000 0x1000>;
    			status = "okay";
    		};
    
    		mwu: mwu@40020000 {
    			compatible = "nordic,nrf-mwu";
    			reg = <0x40020000 0x1000>;
    			status = "okay";
    		};
    
    		pwm1: pwm@40021000 {
    			compatible = "nordic,nrf-pwm";
    			reg = <0x40021000 0x1000>;
    			interrupts = <33 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    			#pwm-cells = <3>;
    		};
    
    		pwm2: pwm@40022000 {
    			compatible = "nordic,nrf-pwm";
    			reg = <0x40022000 0x1000>;
    			interrupts = <34 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    			#pwm-cells = <3>;
    		};
    
    		spi2: spi@40023000 {
    			/*
    			 * This spi node can be SPI, SPIM, or SPIS,
    			 * for the user to pick:
    			 * compatible = "nordic,nrf-spi" or
    			 *              "nordic,nrf-spim" or
    			 *              "nordic,nrf-spis".
    			 */
    			compatible = "nordic,nrf-spi";
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <0x40023000 0x1000>;
    			interrupts = <35 NRF_DEFAULT_IRQ_PRIORITY>;
    			max-frequency = <DT_FREQ_M(8)>;
    			easydma-maxcnt-bits = <8>;
    			status = "disabled";
    		};
    
    		rtc2: rtc@40024000 {
    			compatible = "nordic,nrf-rtc";
    			reg = <0x40024000 0x1000>;
    			cc-num = <4>;
    			interrupts = <36 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    			clock-frequency = <32768>;
    			prescaler = <1>;
    		};
    
    		i2s0: i2s@40025000 {
    			compatible = "nordic,nrf-i2s";
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <0x40025000 0x1000>;
    			interrupts = <37 NRF_DEFAULT_IRQ_PRIORITY>;
    			status = "disabled";
    		};
    
    		gpio0: gpio@50000000 {
    			compatible = "nordic,nrf-gpio";
    			gpio-controller;
    			reg = <0x50000000 0x1000>;
    			#gpio-cells = <2>;
    			status = "disabled";
    			port = <0>;
    			gpiote-instance = <&gpiote>;
    		};
    	};
    	/* COPIED FROM GITHUB END */
    
    	leds {
    		compatible = "gpio-leds";
    		led0: led_0 {
    			gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
    			label = "Green LED";
    		};
    	};
      
    	pwmleds {
    		compatible = "pwm-leds";
    		pwm_led0: pwm_led_0 {
    			pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
    		};
    	};
    
    	buttons {
    		compatible = "gpio-keys";
    		button0: button_0 {
    			gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
    			label = "Button 0";
    		};
    	};
    
    	/* These aliases are provided for compatibility with samples */
    	aliases {
    		led0 = &led0;
    		pwm-led0 = &pwm_led0; 
    		sw0 = &button0;
    		bootloader-led0 = &led0;
    		mcuboot-button0 = &button0;
    		mcuboot-led0 = &led0;
    		watchdog0 = &wdt0;
    		i2c-0 = &i2c0;
    	};
    };
    
    &bt_hci_sdc {
        status = "okay";
    };
    
    &gpiote {
    	status = "okay";
    };
    
    &gpio0 {
    	status = "okay";
    	sense-edge-mask=<0xffffffff>;
    };
    
    &i2c0 {
    	compatible = "nordic,nrf-twi";
    	status = "okay";
    	clock-frequency = <I2C_BITRATE_FAST>;
    	pinctrl-0 = <&i2c0_default>;
    	pinctrl-1 = <&i2c0_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &pwm0 {
    	status = "okay";
    	pinctrl-0 = <&pwm0_default>;
    	pinctrl-1 = <&pwm0_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &flash0 {
    	partitions {
    		compatible = "fixed-partitions";
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		boot_partition: partition@0 {
    			label = "mcuboot";
    			reg = <0x00000000 DT_SIZE_K(48)>;
    		};
    
    		slot0_partition: partition@c000 {
    			label = "image-0";
    			reg = <0x0000c000 DT_SIZE_K(220)>;
    		};
    
    		slot1_partition: partition@43000 {
    			label = "image-1";
    			reg = <0x00043000 DT_SIZE_K(220)>;
    		};
    
    		storage_partition: partition@7a000 {
    			label = "storage";
    			reg = <0x0007a000 DT_SIZE_K(24)>;
    		};
    	};
    };
    
    &uicr {
        nfct-pins-as-gpios;
    };

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