QSPI Flash Failure on nRF5340 When CPU Runs at 128 MHz

Hi nordic team 

I am working with the Nordic nRF5340 SoC using Zephyr RTOS.

Hardware

External QSPI flash:

  • MX25R6435F

QSPI configuration (DeviceTree):

&qspi {
    status = "okay";
    pinctrl-0 = <&qspi_default>;
    pinctrl-1 = <&qspi_sleep>;
    pinctrl-names = "default", "sleep";

    mx25r64: mx25r6435f@0 {
        compatible = "nordic,qspi-nor";
        reg = <0>;
        sck-frequency = <32000000>;
        readoc = "read4io";
        jedec-id = [ c2 20 1a  ];
        /delete-property/ sfdp-bfp;

        size = <536870912>;            
        address-size-32;
        enter-4byte-addr = <0x01>;    
        has-dpd;                      
        t-enter-dpd = <10000>;
        t-exit-dpd = <35000>;
        status = "okay";
        partitions {
            compatible = "fixed-partitions";
            #address-cells = <1>;
            #size-cells = <1>;

            /* 0x00000000 - 0x007FFFFF : 8MB raw I2S / reserved */
            raw_rec_part: partition@0 {
                label = "raw_rec";
                reg = <0x00000000 0x00800000>;
            };
            /* 0x00800000 - 0x03FFFFFF: 56MB FATFS */
            fatfs_part: partition@800000 {
                label = "fatfs";
                reg = <0x00800000 0x03800000>;
            };

        };
    };
};
 the QSPI SCK clock = 32 MHz.

The application core CPU frequency = 128 MHz.

I am configuring the CPU to run at 128 MHz uisng the below api

void set_cpu_128mhz(void)
{
    // Direct register access to set the clock divider to 1 (128MHz)
    // 0 = 128MHz, 1 = 64MHz
    NRF_CLOCK_S->HFCLKCTRL = 0;

    // Update the system variable so timing functions (like your us conversion) are accurate
    SystemCoreClockUpdate();

    printf("SystemCoreClock: %u MHz\n", (unsigned int)(SystemCoreClock / 1000000));
}

Issue observed :

When the CPU runs at 128 MHz:

  • Flash read operations fail

  • Flash write operations fail

why QSPI flash read/write fails when the CPU runs at 128 MHz while the QSPI SCK is configured at 32 MHz? 

Any insights on this issue would be helpful.

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