Grant nRF5340 NET core EasyDMA access to APP core SRAM0, or APP core read access to NET core SRAM1

[yzhu]

Hardware: nRF5340 DK

nRF Connect SDK: v2.6.1

Description:

I am working on a project where there is a need to transfer a large amount of data from NET to APP core. We would like to bypass the hci_ipc service for some reason.

I was following a similar way provided in nrf_dm sample:

1. reduce the 64KB reserved shared-memory region &sram0_shared used by IPC from (0x20070000~0x20080000 size: 64KB for rpmsg_nrf53_sram) to (0x20070000~0x2007c000 size: 48KB)
2. add another section (0x2007c000~0x20080000 size: 16KB) for our proprietary use, so that both cores have write and read access to the 16KB shared-ram region.

And it did work.

Now I want the NET core to be able to set EasyDMA to a buffer in that shared-ram region, but it turns out NET EasyDMA can only point to its own SRAM1 (0x21000000~0x21010000 size: 64KB).

Questions:

1. Is there a way to make NET core EasyDMA point to the shared region 0x2007c000~0x20080000 on SRAM0?

2. Is there a way to grant APP core access to SRAM1 (0x21000000~0x21010000)? I am planning to have a 16KB section reserved in NET core SRAM1 as shared-sram between two cores. Granting APP core read access to SRAM1 is good enough, and it would be perfect if with write access available as well.

[Håkon Alseth]

Hi,

 

1. Is there a way to make NET core EasyDMA point to the shared region 0x2007c000~0x20080000 on SRAM0?

No, this is not possible. This is mentioned in the note her:

https://docs.nordicsemi.com/bundle/ps_nrf5340/page/chapters/soc_overview/doc/soc_overview.html#ariaid-title3

The EasyDMA masters of the network core peripherals cannot access the application core RAM. The network core processor cannot execute code directly from the application core flash or access QSPI XIP memories.

  

So if you need to transfer data between the network core and the application core, you must use the network core CPU (not EasyDMA) to read/write the shared memory region, and use the IPC peripheral to signal the other core that data is available.

2. Is there a way to grant APP core access to SRAM1 (0x21000000~0x21010000)? I am planning to have a 16KB section reserved in NET core SRAM1 as shared-sram between two cores. Granting APP core read access to SRAM1 is good enough, and it would be perfect if with write access available as well.

Unfortunately not. The network core can access application core RAM, via CPU access, but not the other way around.

 

Kind regards,

Håkon

[yzhu]

That's good to know. Thanks for your help!

Best regards,

Yue