nRF7002 interface with STM32 using vanilla Zephyr via QSPI protocol

Subject: Support Request for nRF7002 Integration with ThreadX on STM32

Hello Nordic Team,

We are currently using the nRF7002 with our STM32-based device. We have completed Phase 1 of development using an STM32 MCU, with firmware developed on ThreadX.

For Phase 2, we need to integrate Wi-Fi support using the nRF7002. We would appreciate your support in enabling nRF7002 integration with ThreadX.

Specifically, we would like to know if you can provide drivers or support for the nRF7002 that can be integrated into an existing STM32 project based on ThreadX. This would significantly help us accelerate our development.

Looking forward to your guidance and support.

Best regards,
Sunny Kalyani

Parents
  • Hi

    There is no support for threadX, I will recommend that you contact your regional sales manager to discuss this. You can find use the contact us for this

    Regards

    Runar

  • We have used the vanilla 

    /*
     * Copyright (c) 2023 STMicroelectronics
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    / {
    	chosen {
    		zephyr,wifi = &wlan0;
    	};
    };
    
    &octospi1 {
    	pinctrl-0 = <&octospim_p1_clk_pa3 &octospim_p1_ncs_pa2 &octospim_p1_dqs_pa1
    				 &octospim_p1_io0_pb1 &octospim_p1_io1_pb0 
    				 &octospim_p1_io2_pa7 &octospim_p1_io3_pa6  
    				 &octospim_p1_io4_pc1 &octospim_p1_io5_pc2
    				 &octospim_p1_io6_pc3 &octospim_p1_io7_pc0>;
    
    	pinctrl-names = "default";
    
    	dmas = <&gpdma1 0 7 0x10440>,
    		   <&gpdma1 1 6 0x10480>;
    	dma-names = "tx","rx";
    
    	nrf70: &octospi1 {
    		compatible = "nordic,nrf7002-spi";
    		status = "okay";
    		reg = <0>;
     
    		/* Control GPIOs - using available pins that don't conflict */
    		iovdd-ctrl-gpios = <&gpiob 7 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* D0 */
    		bucken-gpios = <&gpiob 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;     /* D1 */
    		host-irq-gpios = <&gpiog 12 GPIO_ACTIVE_HIGH>;                     /* D7 */
    		/* List of interfaces */
    		wlan0: wlan0 {
    			compatible = "nordic,wlan";
    		};
    		/* Wi-Fi TX power limits */
    		wifi-max-tx-pwr-2g-dsss = <21>;
    		wifi-max-tx-pwr-2g-mcs0 = <16>;
    		wifi-max-tx-pwr-2g-mcs7 = <16>;
    		wifi-max-tx-pwr-5g-low-mcs0 = <13>;
    		wifi-max-tx-pwr-5g-low-mcs7 = <13>;
    		wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
    		wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
    		wifi-max-tx-pwr-5g-high-mcs0 = <12>;
    		wifi-max-tx-pwr-5g-high-mcs7 = <12>;
    	};
    
    	status = "okay";
    };
    
    // &spi1 {
    // 	status = "okay";
    // 	pinctrl-0 = <&spi1_sck_pa1 &spi1_miso_pa11 &spi1_mosi_pa12>;
    // 	pinctrl-names = "default";
    // 	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
    // 	/* High speed SPI configuration for STM32H7 */
    // 	clock-frequency = <DT_FREQ_M(50)>; /* 50MHz SPI clock */
     
    // 	nrf70: nrf7002-spi@0 {
    // 		compatible = "nordic,nrf7002-spi";
    // 		status = "okay";
    // 		reg = <0>;
    // 		spi-max-frequency = <DT_FREQ_M(8)>; /* Increased from 8MHz to 16MHz */
     
    // 		/* Control GPIOs - using available pins that don't conflict */
    // 		iovdd-ctrl-gpios = <&gpiob 7 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* D0 */
    // 		bucken-gpios = <&gpiob 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;     /* D1 */
    // 		host-irq-gpios = <&gpiog 12 GPIO_ACTIVE_HIGH>;                     /* D7 */
    // 		/* List of interfaces */
    // 		wlan0: wlan0 {
    // 			compatible = "nordic,wlan";
    // 		};
    // 		/* Wi-Fi TX power limits */
    // 		wifi-max-tx-pwr-2g-dsss = <21>;
    // 		wifi-max-tx-pwr-2g-mcs0 = <16>;
    // 		wifi-max-tx-pwr-2g-mcs7 = <16>;
    // 		wifi-max-tx-pwr-5g-low-mcs0 = <13>;
    // 		wifi-max-tx-pwr-5g-low-mcs7 = <13>;
    // 		wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
    // 		wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
    // 		wifi-max-tx-pwr-5g-high-mcs0 = <12>;
    // 		wifi-max-tx-pwr-5g-high-mcs7 = <12>;
    // 	};
    // };
    zephyr IDE to interface the NUCLEOU5A5ZJ-Q and nRF7002-DK board.

    NUCLEOU5A5ZJ-Q uses the Octo SPI. And nRF7002 accepts QSPI as the instance while creating the overlay file. Due to this mis-match, the project built is failing. Else the project gets built successfully for the SPI mode.

    Can you guide for this Host MCU interface with nRF7002.

  • Hi there. 

    If you have it running on SPI it should not be any other difference then switching from a SPI node to a QSPI node. 

    Do you have any build fails logs?

    Regards

    Runar

  • Hi Runar,

    I have a question regarding QSPI. Can the nRF5340 also communicate with the nRF7002 using standard SPI instead of QSPI?

  • Hi! 
    Yes as long as you select SPI instead of QSPI its possible

    Regards

    Runar

  • Hi Runar,

    I’m working on interfacing the nRF7002EK with an STM32U5 series MCU. The STM32U5 features an OCTOSPI interface that can also be configured to operate in QSPI mode.

    Could you please provide guidance or point me to relevant documentation on:

    • Configuring the OCTOSPI interface in QSPI mode on the STM32U5, and
    • Using the nRF7002 as a node in this setup?

    Any reference designs, examples, or best practices would be greatly appreciated.

  • My suggestion would be to search through the nRF Connect SDK v3.3.0 and in specific search for "nRF7002-qspi" in .overlay files.

    Here are key documentation resources for using the nRF7002 with QSPI:

    Hardware & Connection

    • QSPI vs SPI interface: The nRF7002 can connect to a host MCU (e.g., nRF5340) via either QSPI or SPI. 
      [QSPI/SPI connections]

    QSPI Commands

    • QSPI command reference: Describes all supported QSPI commands (RDSR, FAST READ, READ4, PP, PP4, CIPHER INIT, etc.) including byte sequences and timing diagrams. [QSPI commands]

    Development Kit Setup

    • nRF7002 EK (Arduino shield): Describes how to strap the EK to an nRF5340 DK for QSPI operation, including which solder bridges to cut/solder and cable connections. [Strapping QSPI on nRF5340 DK]

    • nRF7002 EBII: Describes hardware modifications (cutting SB1–SB4, soldering SB5–SB8) needed to configure the board for QSPI instead of the default SPI. [Configure QSPI on EBII]

    Zephyr/NCS Device Tree

    • Board target support: The nrf7002dk/nrf5340/cpuapp target uses the nordic,nrf7002-qspi compatible binding for the QSPI interface. [nRF7002 DK targets]

    Additional Note

    If you plan to share the QSPI bus between the nRF7002 and external flash, note that the nRF7002 must be on its own dedicated SPI/QSPI instance — it cannot share the bus with other devices. [DevZone Q&A]

    Kenneth

Reply
  • My suggestion would be to search through the nRF Connect SDK v3.3.0 and in specific search for "nRF7002-qspi" in .overlay files.

    Here are key documentation resources for using the nRF7002 with QSPI:

    Hardware & Connection

    • QSPI vs SPI interface: The nRF7002 can connect to a host MCU (e.g., nRF5340) via either QSPI or SPI. 
      [QSPI/SPI connections]

    QSPI Commands

    • QSPI command reference: Describes all supported QSPI commands (RDSR, FAST READ, READ4, PP, PP4, CIPHER INIT, etc.) including byte sequences and timing diagrams. [QSPI commands]

    Development Kit Setup

    • nRF7002 EK (Arduino shield): Describes how to strap the EK to an nRF5340 DK for QSPI operation, including which solder bridges to cut/solder and cable connections. [Strapping QSPI on nRF5340 DK]

    • nRF7002 EBII: Describes hardware modifications (cutting SB1–SB4, soldering SB5–SB8) needed to configure the board for QSPI instead of the default SPI. [Configure QSPI on EBII]

    Zephyr/NCS Device Tree

    • Board target support: The nrf7002dk/nrf5340/cpuapp target uses the nordic,nrf7002-qspi compatible binding for the QSPI interface. [nRF7002 DK targets]

    Additional Note

    If you plan to share the QSPI bus between the nRF7002 and external flash, note that the nRF7002 must be on its own dedicated SPI/QSPI instance — it cannot share the bus with other devices. [DevZone Q&A]

    Kenneth

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