EasyDMA memory location __at__ fails

NCS SDK 3.4.0
NRF54LM20DK

The nRF54LM20A data sheet warns against using the same RAM subordinate by more than one bus manager.  From section 4.2.1,

Avoid situations where more than one bus manager is accessing the same RAM subordinate

There is an example for how to set up an EasyDMA transfer in section 4.2.2.1.

READERBUFFER_SIZE 5
WRITERBUFFER_SIZE 6
uint8_t readerBuffer[READERBUFFER_SIZE] __at__ 0x20000000;
uint8_t writerBuffer[WRITERBUFFER_SIZE] __at__ 0x20000005;
// Configuring the READER channel
MYPERIPHERAL->READER.MAXCNT = READERBUFFER_SIZE;
MYPERIPHERAL->READER.PTR = &readerBuffer;
// Configure the WRITER channel
MYPERIPHERAL->WRITER.MAXCNT = WRITEERBUFFER_SIZE;
MYPERIPHERAL->WRITER.PTR = &writerBuffer;

However, if I add the buffer declaration to my project, the compiler gives an error.  It does not recognize the __at__ directive.

Why are you giving an example that doesn't compile with your tools?

How does one actually specify a particular RAM location for a buffer in order to avoid the conflict between bus managers?

Mary

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  • And I forgot to ask,

    What are the addresses of RAMa, RAMb, and RAMc so that I can ensure that the buffers are in different RAM subordinates?

  • Hi Mary, 

    My apologies for the delay from our side. We were monitoring this thread and saw that Turbo J provided valuable input.

    Are there any specific points which you feel has not been addressed yet? 

    Best regards,

    Maria

  • After some offline discussions, the following achieved what I wanted.

    In an overlay file, create sections for RAM:

    // RAM needs to be one continuous block
     &cpuapp_sram {
            reg = <0x20008000 0x6fc00>;
            ranges = <0x0 0x20008000 0x6fc00>;
    };
    
    /{
    
    	reserved-memory {
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges;
    
    		// Beginning of RAM00
    		dma_ram00: memory@20000000 {
    			compatible = "zephyr,memory-region";
    			reg = <0x20000000 DT_SIZE_K(32)>;
    			zephyr,memory-region = "DMA_0";
    
    		};
    
    		// End of RAM01
    		dma_ram01: memory@20077c00 {
    			compatible = "zephyr,memory-region";
    			reg = <0x20077c00 DT_SIZE_K(32)>;
    			zephyr,memory-region = "DMA_1";
    
    		};
    	};
    
    
    };
    

    In a C file:

    float       g_buffer1[BUF1_SIZE]  __attribute__((section("DMA_0"))) ;
    float       g_buffer2[BUF2_SIZE]  __attribute__((section("DMA_1"))) ;

    The created sections show up in the zephyr.map file:

    Memory Configuration
    
    Name             Origin             Length             Attributes
    FLASH            0x00000000         0x001fd000         xr
    RAM              0x20008000         0x0006fc00         xw
    DMA_0            0x20000000         0x00008000         rw
    DMA_1            0x20077c00         0x00008000         rw
    IDT_LIST         0xffff7fff         0x00008000         xw
    *default*        0x00000000         0xffffffff

    The two buffers are located in their assigned section.

    Thanks for your help.

    Mary

Reply
  • After some offline discussions, the following achieved what I wanted.

    In an overlay file, create sections for RAM:

    // RAM needs to be one continuous block
     &cpuapp_sram {
            reg = <0x20008000 0x6fc00>;
            ranges = <0x0 0x20008000 0x6fc00>;
    };
    
    /{
    
    	reserved-memory {
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges;
    
    		// Beginning of RAM00
    		dma_ram00: memory@20000000 {
    			compatible = "zephyr,memory-region";
    			reg = <0x20000000 DT_SIZE_K(32)>;
    			zephyr,memory-region = "DMA_0";
    
    		};
    
    		// End of RAM01
    		dma_ram01: memory@20077c00 {
    			compatible = "zephyr,memory-region";
    			reg = <0x20077c00 DT_SIZE_K(32)>;
    			zephyr,memory-region = "DMA_1";
    
    		};
    	};
    
    
    };
    

    In a C file:

    float       g_buffer1[BUF1_SIZE]  __attribute__((section("DMA_0"))) ;
    float       g_buffer2[BUF2_SIZE]  __attribute__((section("DMA_1"))) ;

    The created sections show up in the zephyr.map file:

    Memory Configuration
    
    Name             Origin             Length             Attributes
    FLASH            0x00000000         0x001fd000         xr
    RAM              0x20008000         0x0006fc00         xw
    DMA_0            0x20000000         0x00008000         rw
    DMA_1            0x20077c00         0x00008000         rw
    IDT_LIST         0xffff7fff         0x00008000         xw
    *default*        0x00000000         0xffffffff

    The two buffers are located in their assigned section.

    Thanks for your help.

    Mary

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