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SPI - one clock cycle missing?

Hi,

My settings are: NRF_DRV_SPI_FREQ_1M, NRF_DRV_SPI_MODE_2, NRF_DRV_SPI_BIT_ORDER_MSB_FIRST.

I'm trying to readback 0xD8. The proper value should be 0x71. Instead, I'm getting 0xB8. If I understand MODE 2 correctly, I'm doing the following: "SCK active low, sample on rising edge of clock." If I follow the rising edges, I should be getting 0x71 but the first MOSI byte is 0xB0 instead of 0xD8. Can someone help?

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