Is calling NVIC_SystemReset() enough after flashing?

[Marius Heil]

Hello,

is it enough to call NVIC_SystemReset() after I flashed a board so that it returns to lower power consumption? Or do I have to pull out the battery?

Marius

[Ole Bauck]

EDIT 22.02.2017: Added pin reset as a option for getting nRF52 out of debug mode.

You will not get out of debug mode with NVIC_SystemReset(). See below for how to get out of debug mode for nRF51 and nRF52.

nRF51: See part 11.1.3 "Resuming normal mode" in the Reference Manual. You can do a pin reset with nrfjprog: nrfjprog --pinreset.

nRF52: Pin reset (if enabled), power on reset (POR) and brown-out reset (BOR) will get the chip out of debug mode.

Note: If you use jlink version between 6.10b (might also be earlier versions, have not checked) and 6.12e, the debugger will not get the device out of debug mode after programming. Latest version at the moment is 6.12j, which seems to work well.

[cole]

Hi Ole,

I see that SWJ-DP will only reset on POR or BOR per the product spec, but is there no other way to get nRF52 out of debug mode?

nRF52 PS v1.3 says, "When a debug session is over, the external debugger must make sure to put the device back into normal mode since the overall power consumption will be higher in debug interface mode compared to normal mode."

As is suggested above, is there any way an external debugger can command SWJ-DP to resume normal mode without POR or BOR? Can CSYSPWRUPREQ and/or CDBGPWRUPREQ in SW-DP's CTRL/STAT be cleared to resume normal mode?

Are there any other ways to exit debug mode without POR or BOR?

Lastly, it appears that unlike nRF51, nRF52 is not prone to debug mode entry from activity on the SWDCLK line (devzone.nordicsemi.com/.../). How does nRF52 enter debug mode?

[Ole Bauck]

Hi, I was wrong that BOR and POR is the only ways to get the device out of debug mode, you can also use pin reset. I have updated the answer.

The nRF52 requires more pulses on the SWDCLK than nRF51 and some words written to enter debug mode, so the nRF52 is not prone to go into debug mode if there is noise on the SWDCLK pin as the nRF51 was.

[cole]

Hi Ole,

Thanks for the update, but I've been unable to get nRF52 to exit debug mode with a pin reset (using PCA10040).

However, I am seeing from current measurmenets that nRF52 is put back into normal mode (without resetting the target) when nrfjprog or JLinkExe closes the jlink connection unless nRF52 is explicitly left in debug mode with "nrfjprog -d" for example.

My original concern was that reflashing nRF52 over SWD would leave the target in debug mode as was the case with nRF51, and that additionally, unlike nRF51, there was no similar way to resume normal mode by calling a reset and holding SWDCLK/IO low (without POR/BOR). It appears that jlink handles normal mode reentry appropriately, so we will not need any additional circuitry to power cycle nRF52 or hold SWDCLK/IO low to exit debug mode after reflashing in our design.

Thanks