Hello,
is it enough to call NVIC_SystemReset() after I flashed a board so that it returns to lower power consumption? Or do I have to pull out the battery?
Marius
Hello,
is it enough to call NVIC_SystemReset() after I flashed a board so that it returns to lower power consumption? Or do I have to pull out the battery?
Marius
EDIT 22.02.2017: Added pin reset as a option for getting nRF52 out of debug mode.
You will not get out of debug mode with NVIC_SystemReset()
. See below for how to get out of debug mode for nRF51 and nRF52.
nRF51: See part 11.1.3 "Resuming normal mode" in the Reference Manual. You can do a pin reset with nrfjprog: nrfjprog --pinreset
.
nRF52: Pin reset (if enabled), power on reset (POR) and brown-out reset (BOR) will get the chip out of debug mode.
Note: If you use jlink version between 6.10b (might also be earlier versions, have not checked) and 6.12e, the debugger will not get the device out of debug mode after programming. Latest version at the moment is 6.12j, which seems to work well.
Hi Ole,
I see that SWJ-DP will only reset on POR or BOR per the product spec, but is there no other way to get nRF52 out of debug mode?
nRF52 PS v1.3 says, "When a debug session is over, the external debugger must make sure to put the device back into normal mode since the overall power consumption will be higher in debug interface mode compared to normal mode."
As is suggested above, is there any way an external debugger can command SWJ-DP to resume normal mode without POR or BOR? Can CSYSPWRUPREQ and/or CDBGPWRUPREQ in SW-DP's CTRL/STAT be cleared to resume normal mode?
Are there any other ways to exit debug mode without POR or BOR?
Lastly, it appears that unlike nRF51, nRF52 is not prone to debug mode entry from activity on the SWDCLK line (devzone.nordicsemi.com/.../). How does nRF52 enter debug mode?
Hi Ole,
I see that SWJ-DP will only reset on POR or BOR per the product spec, but is there no other way to get nRF52 out of debug mode?
nRF52 PS v1.3 says, "When a debug session is over, the external debugger must make sure to put the device back into normal mode since the overall power consumption will be higher in debug interface mode compared to normal mode."
As is suggested above, is there any way an external debugger can command SWJ-DP to resume normal mode without POR or BOR? Can CSYSPWRUPREQ and/or CDBGPWRUPREQ in SW-DP's CTRL/STAT be cleared to resume normal mode?
Are there any other ways to exit debug mode without POR or BOR?
Lastly, it appears that unlike nRF51, nRF52 is not prone to debug mode entry from activity on the SWDCLK line (devzone.nordicsemi.com/.../). How does nRF52 enter debug mode?