can nrf51822 master SPI clock use 8M?

[wen jin zhang]

we follow the nRF51_Series_Reference_manual v3.0, set the master SPI clock to 8M. but found when in mode 0, the MOSI change near at SCLK rise edge, not in fall edge. our hardware engineer found this: the master SPI clock be 4M in section 8.9 in nRF51822_PS v3.1 but in nrf51822 old version. this value is 8M.

[Petter Myhre]

I think this answers your question.