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Interrupt during ISR

Hi,

we use the GPIOTE to get informed if the value of a GPIO pin gets from hi to low.

If this happens, the GPIOTE event handler will be called.

What will happen, if the value of the GPIO pin gets back to hi and again to low during the process of the GPIOTE event handler?

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  • If the condition for the interrupt is true again while processing the same interrupt, then the interrupt will be pended to NVIC. Read more about the NVIC pend register here

    Since there is only one pending bit per interrupt source, if this condition is true more than once while (or before) processing that interrupt, then the new interrupt will set the pending bit on an already set bit which effectively means the last interrupt(s) which were pended are lost.

    But if only one interrupt of the same source happen during processing, then it will not be lost as it is saved in the pended state of NVIC register.

  • "But if only one interrupt of the same source happen during processing, then it will not be lost as it is saved in the pended state of NVIC register."

    So this means, if the process of the first interrupt is done, a second interrupt is processed because of the pended state of NVIC register?

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