SAADC Limit Disabled Value

[WestCoastDaz]

In SDK 12.2, why is the SAADC #define NRF_DRV_SAADC_LIMITH_DISABLED (2047) set to this value? On a reset the register is set to 32767 according to the product spec and my tests using the debugger.

If I have a single ended channel then my upper limit is 4095 but I can't set this upper limit using nrf_drv_saadc_limits_set since it will assert on line 586 of nrf_drv_saadc.c ASSERT(limit_high <= NRF_DRV_SAADC_LIMITH_DISABLED);

Thanks, Darren

[WestCoastDaz]

Nordic team, Any update on this?

Thanks, Darren

[Jørgen Holmefjord]

I'm not sure about why this is not set acording to product specifications, but it might be leftovers from an old chip version or version of the product specifications. I will check with the driver developer when he is back next week.

[WestCoastDaz]

Jorgen,

Thanks for taking the time to reply and for looking into this issue. I'm not sure that I understand your last statement "You should not need higher values for 12-bits though, as 2047 - (-2048) gives 4095 (2^12-1)." If a channel is configured as single ended, with 12bits of resolution, then my maximum count value will be 4095 which is over the maximum limit of 2047.

Thanks, Darren

[Jørgen Holmefjord]

Sorry, I see this is not the way the implementation of limit_set in the driver works. I edited my above comment to avoid confusion. I did however try to increase the defines, and limits seems to work fine.

[Anne van Rossum]

In the newest SDK (https://infocenter.nordicsemi.com/index.jsp?topic=%2Fsdk_nrf5_v17.0.0%2Fgroup__nrfx__saadc.html&anchor=ga173d0e9cf60be60d50680180a5d82f83) there are still the same defines:

#define 	NRFX_SAADC_LIMITH_DISABLED   (2047)
 	Value to be set as high limit to disable limit detection.
 
#define 	NRFX_SAADC_LIMITL_DISABLED   (-2048)
 	Value to be set as low limit to disable limit detection. 

As if they are true for any ADC configuration...