SAADC Limit Disabled Value

[WestCoastDaz]

In SDK 12.2, why is the SAADC #define NRF_DRV_SAADC_LIMITH_DISABLED (2047) set to this value? On a reset the register is set to 32767 according to the product spec and my tests using the debugger.

If I have a single ended channel then my upper limit is 4095 but I can't set this upper limit using nrf_drv_saadc_limits_set since it will assert on line 586 of nrf_drv_saadc.c ASSERT(limit_high <= NRF_DRV_SAADC_LIMITH_DISABLED);

Thanks, Darren

[Jørgen Holmefjord]

I'm not sure about why this is not set acording to product specifications, but it might be leftovers from an old chip version or version of the product specifications. I will check with the driver developer when he is back next week.

[Anne van Rossum]

In the newest SDK (https://infocenter.nordicsemi.com/index.jsp?topic=%2Fsdk_nrf5_v17.0.0%2Fgroup__nrfx__saadc.html&anchor=ga173d0e9cf60be60d50680180a5d82f83) there are still the same defines:

#define 	NRFX_SAADC_LIMITH_DISABLED   (2047)
 	Value to be set as high limit to disable limit detection.
 
#define 	NRFX_SAADC_LIMITL_DISABLED   (-2048)
 	Value to be set as low limit to disable limit detection. 

As if they are true for any ADC configuration...

[Jørgen Holmefjord]

Hi,

There is a not about this in the known issues section in the release notes for SDK 17:

*** Known Issues
****************

** Drivers and libraries **

- The SAADC driver (from nrfx 1.8.x) does not handle detection limits 'high' and 'low'
  correctly if SAADC resolution is greater than 10 bits.
  SAADC driver ported from nrfx 2.2.x is not affected by this.