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Always getting NCK.

Hi,

I'm trying to control LSM6DS3 by TWI communication. Slave address of the chip is 0xD4 when SDO/SA0 pin is low.

I'm using SDK13.0.0.

My code is like below.

ret_code_t err_code;

uint8_t flag=0;
uint8_t *LSM_DATA;

err_code = twi_init();
APP_ERROR_CHECK(err_code);

while (true)
{
	twi_test();
	nrf_delay_ms(100);
	flag = 0;
}

twi_init()

ret_code_t err_code;
	
const nrf_drv_twi_config_t twi_config = {
   .scl                = 4,
   .sda                = 3,
   .frequency          = NRF_TWI_FREQ_100K,
   .interrupt_priority = APP_IRQ_PRIORITY_HIGH,
   .clear_bus_init     = false
};
	err_code = nrf_drv_twi_init(&m_twi_master, &twi_config, NULL, NULL);
	nrf_drv_twi_enable(&m_twi_master);
	return err_code;

twi_test()

ret_code_t err_code;

uint8_t slv_addr = 0xD4>>1;
uint8_t temp1 = 0x12;
uint8_t temp3[2] = {temp1, 0x00};

err_code = nrf_drv_twi_tx(&m_twi_master, slv_addr, temp3, sizeof(temp3), false);
return err_code;

It is almost similar to example code.(twi_sensor_pca10040) But I don't know why always NCK.

I checked hardware and TWI timing diagram and is correct.

Any help is greatly appreciated.

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Oscilloscope capture image

image description image description image description image description

Parents
  • Your oscilloscope output looks correct. I can see clean start bit and the device address 0x6a (110 10101) and the write bit but a Nack from slave. If the slave is able to give NACK on the 9th byte then the proper stop bit. You said that the sensor is Acking with other masters. Only thing we can do is to put the oscilloscope output side by side and where the timing issue is.

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  • Your oscilloscope output looks correct. I can see clean start bit and the device address 0x6a (110 10101) and the write bit but a Nack from slave. If the slave is able to give NACK on the 9th byte then the proper stop bit. You said that the sensor is Acking with other masters. Only thing we can do is to put the oscilloscope output side by side and where the timing issue is.

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