NRF52 current peaks

[genis]

I am seeing strange current spikes when measuring the consumption in a nRF52 chip. The board the chip is on is a custom board, but the nRF52 power supply has been isolated so its consumption can be measured alone. I didn't flash any soft device and I'm running the simplest of the programs to enter System OFF mode.

int main(void) {
    NRF_POWER->DCDCEN |= POWER_DCDCEN_DCDCEN_Msk;
    NRF_POWER->TASKS_LOWPWR = 1;
    NRF_POWER->SYSTEMOFF = POWER_SYSTEMOFF_SYSTEMOFF_Enter;
}

Still, I see spikes of current at about 3.5Hz with max current peaks of about 13-14mA. See images below (sorry about the narrow yellow spikes):

The only explanation I can think about is that it may be caused by the refresh modes of the current regulator, as explained in some other posts in this forum. Anyway that's a very unclear feature to me and I can't find anything about it on the nRF52 product spec. Also those peaks I'm measuring are really high and very often.

Anyone any thoughts about this?

[AmbystomaLabs]

The DC/DC will run in the megahertz range and should only come on during major IC activity. Otherwise it just uses the LDO which has a high frequency white noise pattern and very small amplitude.

You are disconnecting the SWD when running this test, right?

[genis]

Ok, I read somehwere that the DC/DC basically activates on RF operation. And I disconnect the SWD after I flash it.

[AmbystomaLabs]

The RF events are certainly the peak power times, however even during constant use of the processor the SD (when used) will switch to the DCDC since power consumption is improved dramatically.

Even so, the DCDC runs at probably 1MHz or more (the spec doesn't say) and definitely not at 3.5Hz. And, since DCC is on for either LDO or DCDC operation, it is not like there should be a large spike to fill up caps or something.

If that is really all the code on the device then all GPIO should be in input mode and not sourcing. I would suggest you put in the code some way to make sure it is not resetting at 3.5Hz. You could have local noise driving the reset line. And, you should monitor vdd_nRF to make sure there isn't a corresponding dip that is causing a brownout reset.

What voltage are you running the nRF at?

[genis]

Thank you for your help. That's the only code in my project apart from the startup code, which I got from one of the examples in the SDK. The chip is powered at 3V and supply is stable and no reset is occurring.

I saw the same spikes while monitoring the consumption in a larger project. I started to remove code modules to try to identify what was causing the current spikes and ended up with the snippet I pasted no the question. In the original, larger project I could see the same kind of spikes although at a different rate.

The behavior I see is very similar to the "power off" graph in this tutorial: devzone.nordicsemi.com/.../. The biggest difference is that my current spikes are way larger than those in the tutorial. I wonder if I could reduce them somehow as it's drawing a lot of power from the battery right now.

[MartinBL]

If you saw the same spikes in other projects I suppose you have done it correctly, but I'm going to ask anyway: does your probe attenuation match the settings on your scope? 13-14mA is suspiciously close to 10x of what you would expect from the refresh mode. The frequency seems a bit high for refresh in system off though, but the pulse width (10-15uS expected) seems to match too.