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NRF52 current peaks

I am seeing strange current spikes when measuring the consumption in a nRF52 chip. The board the chip is on is a custom board, but the nRF52 power supply has been isolated so its consumption can be measured alone. I didn't flash any soft device and I'm running the simplest of the programs to enter System OFF mode.

int main(void) {
    NRF_POWER->DCDCEN |= POWER_DCDCEN_DCDCEN_Msk;
    NRF_POWER->TASKS_LOWPWR = 1;
    NRF_POWER->SYSTEMOFF = POWER_SYSTEMOFF_SYSTEMOFF_Enter;
}

Still, I see spikes of current at about 3.5Hz with max current peaks of about 13-14mA. See images below (sorry about the narrow yellow spikes):

image description

Detail The only explanation I can think about is that it may be caused by the refresh modes of the current regulator, as explained in some other posts in this forum. Anyway that's a very unclear feature to me and I can't find anything about it on the nRF52 product spec. Also those peaks I'm measuring are really high and very often.

Anyone any thoughts about this?

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  • The RF events are certainly the peak power times, however even during constant use of the processor the SD (when used) will switch to the DCDC since power consumption is improved dramatically.

    Even so, the DCDC runs at probably 1MHz or more (the spec doesn't say) and definitely not at 3.5Hz. And, since DCC is on for either LDO or DCDC operation, it is not like there should be a large spike to fill up caps or something.

    If that is really all the code on the device then all GPIO should be in input mode and not sourcing. I would suggest you put in the code some way to make sure it is not resetting at 3.5Hz. You could have local noise driving the reset line. And, you should monitor vdd_nRF to make sure there isn't a corresponding dip that is causing a brownout reset.

    What voltage are you running the nRF at?

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  • The RF events are certainly the peak power times, however even during constant use of the processor the SD (when used) will switch to the DCDC since power consumption is improved dramatically.

    Even so, the DCDC runs at probably 1MHz or more (the spec doesn't say) and definitely not at 3.5Hz. And, since DCC is on for either LDO or DCDC operation, it is not like there should be a large spike to fill up caps or something.

    If that is really all the code on the device then all GPIO should be in input mode and not sourcing. I would suggest you put in the code some way to make sure it is not resetting at 3.5Hz. You could have local noise driving the reset line. And, you should monitor vdd_nRF to make sure there isn't a corresponding dip that is causing a brownout reset.

    What voltage are you running the nRF at?

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