Hi there,
I was trying to understand "sleep" power modes of the chip (CPU + Peripherals) in a bit more details - but my understanding is that everything is handled by the PMU unit and is somewhat "abstracted" from the user implementaiton. Is that correct?
However, is there a document somewhere that sets out some of the concept of this block? Or is it a complete black box? Are there coding/configuration guidelines to make sure the PMU operation will actually be optimal? Is there some registers we can read to get a feel for that peripheral is active at some specific points of our application?
Thanks for your help, Mickael
