After enabling and starting the watchdog timer (RR0), how can it be disabled?
This following code does not work:
NRF_WDT->RREN &= ~(1 << WDT_RREN_RR0_Pos);
Neither does:
NRF_WDT->POWER = 0;
Edit: I'm using a Rev G0 chip.
After enabling and starting the watchdog timer (RR0), how can it be disabled?
This following code does not work:
NRF_WDT->RREN &= ~(1 << WDT_RREN_RR0_Pos);
Neither does:
NRF_WDT->POWER = 0;
Edit: I'm using a Rev G0 chip.
I don't believe this is an errata item. Rather, it appears to be a designed in behavior. If you look at the Reference Manual (2.0) section 11.1.6.8 on reset behaviors, the WDT is preserved on a soft reset. It requires one of the following reset types to be cleared on reset: power, pin, brownout or watchdog.
It could be more clearly stated in the watchdog section of the document as well, but it appears to be design intent.