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LF & HF clock configuration with softdevice

Hello,

I'm newbie with BLE and nrf52382.

I was looking in other questions but couldn't find an answer for my problem.

Our board contains 2 external crystals: one of 32.768KHz connected to XL1 and XL2, and the other of 32MHz connected to XC1 and XC2.

The scenario of initializations is:

nrf_drv_clock_lfclk_request(NULL);

nrf_sdh_enable_request();

Before adding these lines (and other code related to these macros):

NRF_BLE_GATT_DEF(m_gatt);                            /**< GATT module instance. */
BLE_ADVERTISING_DEF(m_advertising);                  /**< Advertising module instance. */

SW didn't stucked.

But after adding the above 2 lines (and other code related to these macros), then,

when calling nrf_sdh_enable_request() function, SW get stucked when getting this line:

        ret_code = sd_softdevice_enable(&clock_lf_cfg, app_error_fault_handler);

ret_code_t nrf_sdh_enable_request(void)
{
    ret_code_t ret_code;

    if (m_nrf_sdh_enabled)
    {
        return NRF_ERROR_INVALID_STATE;
    }

    m_nrf_sdh_continue = true;

    // Notify observers about SoftDevice enable request.
    if (sdh_request_observer_notify(NRF_SDH_EVT_ENABLE_REQUEST) == NRF_ERROR_BUSY)
    {
        // Enable process was stopped.
        return NRF_SUCCESS;
    }

    // Notify observers about starting SoftDevice enable process.
    sdh_state_observer_notify(NRF_SDH_EVT_STATE_ENABLE_PREPARE);

    nrf_clock_lf_cfg_t const clock_lf_cfg =
    {
        .source        = NRF_SDH_CLOCK_LF_SRC,
        .rc_ctiv       = NRF_SDH_CLOCK_LF_RC_CTIV,
        .rc_temp_ctiv  = NRF_SDH_CLOCK_LF_RC_TEMP_CTIV,
    #ifdef S140
        .xtal_accuracy = NRF_SDH_CLOCK_LF_XTAL_ACCURACY
    #else
        .accuracy      = NRF_SDH_CLOCK_LF_XTAL_ACCURACY
    #endif
    };

    #ifdef ANT_LICENSE_KEY
        ret_code = sd_softdevice_enable(&clock_lf_cfg, app_error_fault_handler, ANT_LICENSE_KEY);
    #else
        ret_code = sd_softdevice_enable(&clock_lf_cfg, app_error_fault_handler);
    #endif

    if (ret_code != NRF_SUCCESS)
    {
        return ret_code;
    }

    m_nrf_sdh_enabled   = true;
    m_nrf_sdh_continue  = false;
    m_nrf_sdh_suspended = false;

#ifndef S140
    // Set the interrupt priority after enabling the SoftDevice, since
    // sd_softdevice_enable() sets the SoftDevice interrupt priority.
    swi_interrupt_priority_workaround();
#endif

    // Enable event interrupt.
    // Interrupt priority has already been set by the stack.
    softdevices_evt_irq_enable();

    // Notify observers about a finished SoftDevice enable process.
    sdh_state_observer_notify(NRF_SDH_EVT_STATE_ENABLED);

    return NRF_SUCCESS;
}

My settings in sdk_config.h file are as bellow:

// <e> NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler
//==========================================================
#ifndef NRF_SDH_ENABLED
#define NRF_SDH_ENABLED 1
#endif
// <h> Dispatch model

// <i> This setting configures how Stack events are dispatched to the application.
//==========================================================
// <o> NRF_SDH_DISPATCH_MODEL


// <i> NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context.
// <i> NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler.
// <i> NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually.
// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT
// <1=> NRF_SDH_DISPATCH_MODEL_APPSH
// <2=> NRF_SDH_DISPATCH_MODEL_POLLING

#ifndef NRF_SDH_DISPATCH_MODEL
#define NRF_SDH_DISPATCH_MODEL 0
#endif

// </h>
//==========================================================

// <h> Clock - SoftDevice clock configuration

//==========================================================
// <o> NRF_SDH_CLOCK_LF_SRC  - SoftDevice clock source.

// <0=> NRF_CLOCK_LF_SRC_RC
// <1=> NRF_CLOCK_LF_SRC_XTAL
// <2=> NRF_CLOCK_LF_SRC_SYNTH

#ifndef NRF_SDH_CLOCK_LF_SRC
#define NRF_SDH_CLOCK_LF_SRC 1
#endif

// <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval.
#ifndef NRF_SDH_CLOCK_LF_RC_CTIV
#define NRF_SDH_CLOCK_LF_RC_CTIV 0
#endif

// <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature.
// <i> How often (in number of calibration intervals) the RC oscillator shall be calibrated
// <i>  if the temperature has not changed.

#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV
#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0
#endif

// <o> NRF_SDH_CLOCK_LF_XTAL_ACCURACY  - External crystal clock accuracy used in the LL to compute timing windows.

// <0=> NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM
// <1=> NRF_CLOCK_LF_XTAL_ACCURACY_500_PPM
// <2=> NRF_CLOCK_LF_XTAL_ACCURACY_150_PPM
// <3=> NRF_CLOCK_LF_XTAL_ACCURACY_100_PPM
// <4=> NRF_CLOCK_LF_XTAL_ACCURACY_75_PPM
// <5=> NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM
// <6=> NRF_CLOCK_LF_XTAL_ACCURACY_30_PPM
// <7=> NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM

#ifndef NRF_SDH_CLOCK_LF_XTAL_ACCURACY
#define NRF_SDH_CLOCK_LF_XTAL_ACCURACY 7
#endif

Please help me with this issue.

Parents
  • Hello,

    After more debugging, I found that function nrf_sdh_ble_enable() returns error code =4.

    static void ble_stack_init(void)
    {
        ret_code_t err_code;
    
      
      /*
       * Before the delay was added, nrf_sdh_enable_request() got stuck
       */
      delay();
      
        err_code = nrf_sdh_enable_request();
        APP_ERROR_CHECK(err_code);
    
        // Configure the BLE stack using the default settings.
        // Fetch the start address of the application RAM.
        uint32_t ram_start = 0;
        err_code = nrf_sdh_ble_default_cfg_set(APP_BLE_CONN_CFG_TAG, &ram_start);
        APP_ERROR_CHECK(err_code);
    
        // Enable BLE stack.
        err_code = nrf_sdh_ble_enable(&ram_start);
        APP_ERROR_CHECK(err_code);
    
        // Register a handler for BLE events.
        NRF_SDH_BLE_OBSERVER(m_ble_observer, APP_BLE_OBSERVER_PRIO, ble_evt_handler, NULL);
    }
    

    Here is the contents of the configuration file in my project:

    /*###ICF### Section handled by ICF editor, don't touch! ****/
    /*-Editor annotation file-*/
    /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
    /*-Specials-*/
    define symbol __ICFEDIT_intvec_start__ = 0x23000;
    /*-Memory Regions-*/
    define symbol __ICFEDIT_region_ROM_start__   = 0x23000;
    define symbol __ICFEDIT_region_ROM_end__     = 0x7ffff;
    define symbol __ICFEDIT_region_RAM_start__   = 0x20001720;
    define symbol __ICFEDIT_region_RAM_end__     = 0x2000ffff;
    export symbol __ICFEDIT_region_RAM_start__;
    export symbol __ICFEDIT_region_RAM_end__;
    /*-Sizes-*/
    define symbol __ICFEDIT_size_cstack__   = 0x800;
    define symbol __ICFEDIT_size_heap__     = 0x200;
    /**** End of ICF editor section. ###ICF###*/
    
    define memory mem with size = 4G;
    define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
    define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
    
    define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
    define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
    
    initialize by copy { readwrite };
    do not initialize  { section .noinit };
    
    keep { section .intvec };
    place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
    place in ROM_region   { readonly };
    place in RAM_region   { readwrite,
                            block CSTACK,
                            block HEAP };

    The SW calls NVIC_SystemReset() which is in app_error_fault_handler().

    Please help.

  • Thanks alot for your reply.

    I've changed the RAM start adders from 0x20001720 to 0x20002068 and it solved the problem.

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