Hi,
I wonder if all Tracedata[n] pins are needed for debug? That would make five IO:s useless for other functions. Or is it possible to use 1-bit mode or something similar? If that is possible, are there any limitations other than data speed?
Hi,
I wonder if all Tracedata[n] pins are needed for debug? That would make five IO:s useless for other functions. Or is it possible to use 1-bit mode or something similar? If that is possible, are there any limitations other than data speed?
Hi Peter
For regular debugging you only need the SWD pins (SWDIO and SWDCLK), and you are free to use the trace pins for other purposes.
The Tracedata pins are only required if you want to do a full instruction trace during debugging, but this requires dedicated trace hardware to use (the Segger chip on the development kits are not set up for this).
Best regards
Torbjørn
Hi,
We have dedicated trace hardware for this. But for trace functionality, do you need all five signals or does it work with a subset (like clk plus one or two of the tracedata pins)? I want to fulfill the needs of our sw guys, while not letting them occupy too many IO:s... If a subset works, what are the limitations compared with using all tracedata? Speed I guess?
Hi Peter
For full ETM trace you need all the pins unfortunately.
With a single data pin you only get ITM, which is not sufficient if you want to do live instruction trace.
Best regards
Torbjørn
Hi Peter
For full ETM trace you need all the pins unfortunately.
With a single data pin you only get ITM, which is not sufficient if you want to do live instruction trace.
Best regards
Torbjørn