Differential ADC source resistance

[WoutZenso]

Hi all,

We are working on a project that requires us to measure the resistance of something applied externally. We are mainly interested in the change of resistance over time. It is possible to control the maximum resistance (default state) to some extend, and we have been asked by the supplier of this external part to define a maximum allowable resistance to have a clear reading between open circuit and the actual resistance value. You can find a draft of our intended circuit in the screenshot below.

The vertical line shows the interface, R5 is the external part. The values of R1-4 are specified because it will be a medical application. R1 and R4 are there to limit the current below 10µA in the case the two contacts going outside are being touched. The values for R2 and R3 are specified for the same purpose, but in single fault condition (limit is 50µA). 

I read in the datasheet that the source resistance should be limited to 800k. The picture from the datasheet shows a single-ended ADC. I am a bit confused on how I can translate this to a differential ADC? Should I treat both differential inputs as single-ended input and calculate my worst case source resistance as 150k+R+30k (3V to ADC-)? If that is the case, it would mean that R can have a maximum value of 620k.

Is this correct, or am I missing something related to the differential usage of the ADC?

Thanks!

[haakonsh]

The maximum source resistance limit is due to the sample-and-hold circuit, we need to charge the sampling capacitor before the Aquisition timer runs out and samples the capacitor. If the source resistance is too great the current flowing into the sampling capacitor will not be able to fully charge the capacitor before the voltage across it is sampled. 

As long as the maximum source resistance is less than 800kohm you're good, so your calculation of 150k+R+30k < 800kohm is correct. It does not matter how many inputs you have connected, they all got the same limit of 800kohm.

[WoutZenso]

Thank haakonsh for your fast reply! I am still a bit in the dark about how the differential ADC works internally. Should I see it as both the positive and negative input of the ADC having a sampling capacitor to the ground, or is there just one sampling capacitor between both inputs? My calculation assumes the first approach, but if it is the second approach, I'm not entirely sure on how to estimate the source resistance. Would it still be the same?

[haakonsh]

They both have their own sampling capacitors. 

Btw, if you use a Wheatstone Bridge you can reduce your component count by one:


If you keep R2 constant there will be a voltage differential between D and B that can be used to calculate Rx. R2 also sets the 0V point, where R2 = Rx. 

[WoutZenso]

Thank you haakonsh for the suggestion though I think that this might be a little overkill for our application. The change in resistance is quite significant, it is more like a switch principle (either it is open, or it is closed, but with high resistance). As far as I understand, Wheatstone bridges are excellent to see small changes in resistance with high accuracy. That is not really our concern. The extra cost of one resistor is so small that it won't justify the additional design/testing time to get everything tuned perfectly (with contact resistance at the interface and so on).