Hi,Master:
1.The timing of the underlying nrfx_qspi_write(...) function is:a. Send 05 to check if the wip bit is 0. (Here, if wip is not 0, will it always detect until wip is 0?)
2. Is the register ADDRCONF used for what purpose?
3.the nrfx_qspi_init(...) function will trigger the status register timing, and the task is activated(As shown below). How does the peripheral determine that it is activated successfully? What does this function do internally to the underlying layer?
nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE);
// Waiting for the peripheral to activate
bool result;
NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
QSPI_DEF_WAIT_ATTEMPTS,
QSPI_DEF_WAIT_TIME_US,
result);
4.Is there a bug in the nrf_qspi_cinstrdata_get(...) function? When the length is greater than NRF_QSPI_CINSTR_LEN_5B, the data of <= NRF_QSPI_CINSTR_LEN_5B cannot be obtained.So I added the code for the red area
Thanks!