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MCP7940 drivers for nrf52840

We are working on external RTC MCP7940(i2c) interfaced with nrf52840. Please check if drivers of the same for nrf52/51 are available or any implementation of CLOCK using MCP7940 with NRF?

Regards

Vishal Aditya

Embedded Software Engineer

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  • HI Vishal, 

    I assume that the above trace is the address byte being transferred. If the MCP7940 has 0x6F as its TWI address, then you should expect to see 0b1101111, hten a READ bit followed by a ACK bit( SDA held low). From the first video, Scope of NRF52840 connected on I2C to MCP7940(Not Working), then I see 0b1101111 being sendt followed by a READ bit and then I think I see a ACK from the MCP7940, but I am not sure as I am only able to see if there are 8 or 9 CLK pulses before SDA is pulled high.Can you try to capture the entire TWI frame on the screen, i.e. 9 clk cycles on screen at the time? However, it would appear that the nRF52840 is just sending the 0x6F address and then issues a STOP condition as SDA goes high after SCL. It should wait for data from the MCP7940 by holding the CLK low, and then allow the MCP7940 to drive the clock line. 

    Best regards

    Bjørn

  • //    for (address = 1; address <= TWI_ADDRESSES; address++)
    //    {
    				while(1)
    				{
            err_code = nrf_drv_twi_rx(&m_twi, 0x6F, &sample_data, sizeof(sample_data));
            if (err_code == NRF_SUCCESS)
            {
                detected_device = true;
                NRF_LOG_INFO("TWI device detected at address 0x%x.\r\n", address);
    
            }
            NRF_LOG_FLUSH();
    			}

    please check if this works for you? Let me know if a logic analyzer is required?

  • bjorn , can u pls. check the codes for mcp7940 and help in resolving

  • The screenshot showing nine clock pulses show that the slave does not ACK the address as the SDA line is high on the 9th clock pulse, you should also see nrf_drv_twi_rx returning NRF_ERROR_DRV_TWI_ERR_ANACK.

    The nRF is correctly transmitting 0b11011111( 7 bit address 1101111 followed by the read bit set to 1) and then on the 9th clock pulse the MCP7940 is not pulling the SDA lin low to ACK the address transmission. 

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