用nRF5SDK160098a08e2里面的spis工程在52832开发板上跑,但数据发送不正常
1,从逻辑分析仪图上看,spi主的时序没问题,发送的数据内容也没问题,但MISO这跟线的数据经常发不完整
用nRF5SDK160098a08e2里面的spis工程在52832开发板上跑,但数据发送不正常
1,从逻辑分析仪图上看,spi主的时序没问题,发送的数据内容也没问题,但MISO这跟线的数据经常发不完整
Hi,
Do you mean nRF52832DK MISO sent incomplete data while executing the SDK 16/spis example? If so, which pin are you using for MISO on Slave and Master boards?
-Amanda H.
Yes, in the example, the MISO pin is p0.30, but i use the silicon's efm32zgf32 to work as the Master spi。
Did you set the same SPI mode on both sides?
-Amanda H.
Yes,I did
Unfortunately, we do have efm32zg210f32 and could not use DKs to reproduce the problem.
-Amanda H.
Did you test it with my code? I tested it with two efm32zg boards, and both produce the same problem.
or could you send your code to me.
Assuming nRF52832 operates as an SPIS slave then there must be a delay between CSN (Enable) go low, and first CLK cycle. This delay depends on the power mode (see https://devzone.nordicsemi.com/support-private/support/207669#permalink=371965), the delay should be >10us for low power mode (default) and >1us for constant latency mode.
-Amanda H.
Assuming nRF52832 operates as an SPIS slave then there must be a delay between CSN (Enable) go low, and first CLK cycle. This delay depends on the power mode (see https://devzone.nordicsemi.com/support-private/support/207669#permalink=371965), the delay should be >10us for low power mode (default) and >1us for constant latency mode.
-Amanda H.