High Sample Rate with ADC and SoftDevice

[Chris]

I am trying to sample the ADC every 2ms. I notice lots of slowness with BLE advertising and typically can't connect to device over BLE when sampling. I am using PPI, configuring, and starting before the softdevice is enabled.

1. Should nRF51822 be capable of reading ADC every 1ms to 2ms reliably?

2. Should I move all the PPI configuration to after the softdevice is enabled and be using the sd_ppi functions?

Thanks!

Edit: Headline, format, added tags.

[Peter Myerscough-Jackopson]

I note that it is not possible to use the ARM core to 'sample' the ADC value regularly enough, BUT Is it possible to use the EasyDMA in the SPIS devices?

My proposal:

The ADC would be set to capture a value using the PPI and its START task and a timer, this gives the regular sample, but not the ability to 'save' the value before it is overwritten.

To 'save' the data, the SPIS could be set to loop back upon itself, with the TXDPTR set to the ADC result address, and the MAXTX set to 1 for 8-bit samples and 2 for 10 or 9 bit samples. The RXDPTR would then be set to a normal RAM address with a normal buffer size for example 256 to capture 256 8-bit samples.

Then you connect the MOSI and MISO pins, and the SCK to a suitable clock source (maybe the Master's clock, and then finally connect the CSN to a GPIO that is triggered using the PPI to make a suitably long chip enable signal.

I know this is convoluted, but the SPIS is the only memory bus master other than those used by the SoftDevice. Is this a feasible, if awkward, solution to regular sampling whilst the SoftDevice is enabled?

It would be useful to have some feedback to this proposal to help me make my product selection as the ADC capability is one of the nRFs key features (aside from its Bluetooth capabilty).

Yours,

Peter Myerscough-Jackopson

[Peter Myerscough-Jackopson]

Lucas, although I have not done the work, using the SPIS unit you would configure the RX to be many samples long, and the TX to be just a single sample long from one ADC location. The PPI would then enable the transfer of just one ADC measurement, by pulsing the SPIS CS/EN pin for just a single transfer period. This would mean the RX transfer would receive one measurement, but not complete, whilst the TX would send one measurement. The RX transfer would therefore slowly fill up the buffer it is given for its transfer, whilst the TX would repeatedly read the ADC result register location.

I hope this helps in clarifying the concept of using the SPIS to achieve regular sampling. The rev3 silicon will not require the SPIS to achieve higher sampling rates 5-10kHz, but as Stefan says we are only guessingwaiting in that regards.

Peter