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nRF52832 current consumption without customer applicative FW (freshly produced chipsets)

Hi,
I got a question on nRF52832 platform. When it is brand new (so without loading any of our FW) and powered through 3V3, it draws up to 4.6mA when powered. But we also noticed that this consumption sometimes is more (or less)
Is it because the chipset can be in different default modes when powered but not flashed?
And I guess unless we settle a specific register, so without flashing anything, we cannot use the reset (P0.21) as an actual Hw reset, am I right ? (Pulling this pin low seems to have no effect on current consumption)
I ask these specifically for Industrial test (we're ramping up), in which we do perform current measurement (All MCUs in reset) to first check there's no shortcut or abnormal soldering
It appears that pulling P0.21 down doesn't have any effect on current (which makes sense), but we 'd like to know what is the range of current consumption when this chipset is powered and unflashed
Thanks in advance for your support
Regards,
Cédric
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  • powered through 3V3, it draws up to 4.6mA when powered

    Sounds about right.

    Empty flash is 0xFFFFFFFF, which would trigger a fault when loaded into the PC. This will also happen during hard fault handling, triggering lockup reset.

    In other words, the chip is held mostly in reset, thus there will be minimal differenc in current when reset pin is actually pulled down.

    There is no specified current in the PS, but an upper bound would be the "CPU running from flash, LDO" numbers.

    In practise the current is significantly lower, since most of the time the CPU core will be powered but not actually running.

    Note: There is AFAIK no specified timing for the lockup reset, but one could reasonably assume it takes about the same as the ~3µs typical IDLE-to-ON time.

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  • powered through 3V3, it draws up to 4.6mA when powered

    Sounds about right.

    Empty flash is 0xFFFFFFFF, which would trigger a fault when loaded into the PC. This will also happen during hard fault handling, triggering lockup reset.

    In other words, the chip is held mostly in reset, thus there will be minimal differenc in current when reset pin is actually pulled down.

    There is no specified current in the PS, but an upper bound would be the "CPU running from flash, LDO" numbers.

    In practise the current is significantly lower, since most of the time the CPU core will be powered but not actually running.

    Note: There is AFAIK no specified timing for the lockup reset, but one could reasonably assume it takes about the same as the ~3µs typical IDLE-to-ON time.

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