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Nrf9160 + AD74413R spi problem with write/read

We have AD74413R and we try send 32-bits frame size using spi interface and try read results, but it return always zero or 0xff bit. Maybe spi interface nrf9160 cannot work with 32-bits frame?
Link - https://www.analog.com/media/en/technical-documentation/data-sheets/AD74413R.pdf (51 page).

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  • Hi Mikhail,

    Please check out the SPI peripheral documentation for the nRF9160: https://infocenter.nordicsemi.com/index.jsp?topic=%2Fps_nrf9160%2Fspim.html&cp=2_0_0_5_12

    I do see why that should not work. I would like to know more about your implementation instead. 
    Have you checked with a logic analyzor that it is actually behaving correctly?

  • We don't have logic analyzor :) It's hardcore develop, but between transactions => amperage from 0.04 to 0.05A

    #define LOG_LEVEL CONFIG_LOG_DEFAULT_LEVEL
    #include <logging/log.h>
    LOG_MODULE_REGISTER(main);
    #include <zephyr.h>
    #include <string.h>
    #include <sys/printk.h>
    #include <stdio.h>
    #include <drivers/gpio.h>
    #include <drivers/spi.h>
    
    #define STACK_SIZE 512
    u8_t buffer_tx[] = {0x41, 0x01, 0x46, 0xFF};//{0x46, 0x00, 0x00, 0xFF};
    #define BUF_SIZE sizeof(buffer_tx)
    u8_t buffer_rx[BUF_SIZE] = {};
    
    u8_t buffer2_tx[] = {0x00, 0x00, 0x00, 0xFF};
    #define BUF2_SIZE  sizeof(buffer2_tx)
    u8_t buffer2_rx[BUF2_SIZE] = {};
    
    #define PIN_3_3_ON 25
    #define PIN_3_3_PER_ON 24
    #define PIN_BAT_ON 22
    
    #define SPI_CS NULL
    #define CS_CTRL_GPIO_DRV_NAME ""
    
    #define SPI_DRV_NAME	"SPI_3"
    #define SPI_SLAVE	0
    #define SLOW_FREQ	500000
    #define FAST_FREQ	16000000
    
    #define CS_CTRL_GPIO_PIN 28
    static struct device *gpio;
    static struct device *spi;
    
    struct spi_config spi_cfg = {
    	.frequency = SLOW_FREQ,
    #if CONFIG_SPI_LOOPBACK_MODE_LOOP
    	.operation = SPI_OP_MODE_MASTER | SPI_MODE_CPOL | SPI_MODE_LOOP |
    #else
    	.operation = SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
    #endif
    	SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_LINES_SINGLE,
    	.slave = SPI_SLAVE,
    	.cs = SPI_CS,
    };
    
    struct spi_buf tx_buf = {
      .buf = buffer_tx,
      .len = sizeof(buffer_tx),
    };
    const struct spi_buf_set tx = {
      .buffers = &tx_buf,
      .count = 1
    };
    
    struct spi_buf rx_buf = {
      .buf = buffer_rx,
      .len = sizeof(buffer_rx),
    };
    const struct spi_buf_set rx = {
      .buffers = &rx_buf,
      .count = 1
    };
    
    int main()
    {
      int err;
    
      gpio = device_get_binding("GPIO_0");
      spi = device_get_binding(SPI_DRV_NAME);
    
      err = gpio_pin_configure(gpio, PIN_3_3_ON, GPIO_DIR_OUT);
      if (err == 0) 
      {
        err = gpio_pin_write(gpio, PIN_3_3_ON, 1);
        LOG_INF("err %d", err);
      }
      err = gpio_pin_configure(gpio, PIN_3_3_PER_ON, GPIO_DIR_OUT);
      if (err == 0) 
      {
        err = gpio_pin_write(gpio, PIN_3_3_PER_ON, 1);
        LOG_INF("err %d", err);
      }
    
      err = gpio_pin_configure(gpio, PIN_BAT_ON, GPIO_DIR_OUT);
      if (err == 0) 
      {
          err = gpio_pin_write(gpio, PIN_BAT_ON, 1);
          LOG_INF("err %d", err);
      }
    
      err = gpio_pin_configure(gpio, CS_CTRL_GPIO_PIN, GPIO_DIR_OUT);
      if (err == 0) 
      {
          gpio_pin_write(gpio, CS_CTRL_GPIO_PIN, 1); //PULL CS HIGH
      }
    
    
      //1
      buffer_tx[3] = crc8_ccitt(0, buffer_tx, 3);
      buffer2_tx[3] = crc8_ccitt(0, buffer2_tx, 3);
    
      int ret;
      
      LOG_INF("Start complete multiple");
      ret = gpio_pin_write(gpio, CS_CTRL_GPIO_PIN, 0); //PULL CS LOW
      ret = spi_transceive(spi, &spi_cfg, &tx, NULL);
      if (ret) 
      {
          LOG_ERR("Code %d", ret);
          return ret;
      }
      ret = gpio_pin_write(gpio, CS_CTRL_GPIO_PIN, 1); //PULL CS HIGH
    
    
      //2
      tx_buf.buf = buffer2_tx;
      tx_buf.len = sizeof(buffer2_tx);
      
      ret = gpio_pin_write(gpio, CS_CTRL_GPIO_PIN, 0); //PULL CS LOW
      ret = spi_transceive(spi, &spi_cfg, &tx, &rx);
      if (ret) 
      {
          LOG_ERR("Code %d", ret);
          return ret;
      }
      ret = gpio_pin_write(gpio, CS_CTRL_GPIO_PIN, 1); //PULL CS HIGH
    
      rx_buf.buf = buffer2_rx;
      rx_buf.len = sizeof(buffer2_rx);
    
      ret = gpio_pin_write(gpio, CS_CTRL_GPIO_PIN, 0); //PULL CS LOW
      ret = spi_transceive(spi, &spi_cfg, &tx, &rx);
      if (ret) 
      {
          LOG_ERR("Code %d", ret);
          return ret;
      }
      ret = gpio_pin_write(gpio, CS_CTRL_GPIO_PIN, 1); //PULL CS HIGH
    
      if (memcmp(buffer_tx, buffer_rx, BUF_SIZE)) 
      {
          return -1;
      }
    
      if (memcmp(buffer2_tx, buffer2_rx, BUF2_SIZE)) 
      {
          return -1;
      }
      
      LOG_INF("Passed");
      return 0;
    }

  • Hi Mikhail,
    Without a Logic analyzer it is difficult to verify correct behavior of the SPI interface.
    I strongly recommend getting a hold of such equipment.

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