What does consume more power, IO pull-up or IO pull-down? Didn't find information about this on the product specification.
What does consume more power, IO pull-up or IO pull-down? Didn't find information about this on the product specification.
Hi Jose
According to nRF51822 PS v3.1 section 8.23 pullup and pulldown resistors have a typical value of 13kohm. Therefore, if you have e.g. a button that connects a certain pin to ground when pressed, and the pin is configured as input with pullup, and you have supply power of 3.0 volts for the nRF51, then the current consumption is 3/13k=230uA when the button is pressed.
Hi Jose
According to nRF51822 PS v3.1 section 8.23 pullup and pulldown resistors have a typical value of 13kohm. Therefore, if you have e.g. a button that connects a certain pin to ground when pressed, and the pin is configured as input with pullup, and you have supply power of 3.0 volts for the nRF51, then the current consumption is 3/13k=230uA when the button is pressed.
Would there be a way to calculate the minimal pull up resistor value? I tried pull up values of 1M and 10M to decrease the current consumption but with these values the button is not triggered.
When not pressing the button (i.e. pulling the pin signal low with external circuit), there should be close to no current consumption (<1uA) if the GPIO pin is configured as input. There is only drawn 230uA when the button is pressed. My primary question is: Is this current consumption really of concern? Is your scenario that the button is pressed a lot? For CR2032 coin cell battery with 220mAh energy capacity at 3V, the lifetime is 0.22Ah/0.00023A = 956 hours = 40 days when the button is pressed all the time. For normal use case, I would assume a device button is pressed less than a minute a day, perhaps a few seconds. So is this current consumption of a concern in your case? I suspect that the internal nRF51 pull resistor values were chosen to give adequate pullup/pullldown for most situations, i.e. to overcome disturbance from different environmental factors. Your situation might be different though, but my opinion is sticking to the internal resistors by choosing pullup/pulldown configuration for the GPIO pins would be the safest choice.
Thanks for you response. Yes normally this wouldn't be a problem I agree but in our product use case the button will be used very intensely. It will be pressed approximately 3 hours a day then it has quite a influence on the battery life.
ok, I understand. In your case this obviously has major influence on the battery life. What I would recommend then in your case is to connect an oscilloscope to the GPIO pin that you connect to the button, disable internal pull, and experiment with different external pullup resistors, if weaker pullup can actually remove noise from the pin in all situations that you can think of that can cause disturbance to that pin. Another option would be to add a circuit to your PCB that generates a short pulse when a button is pressed, which is adequately long to trigger a nRF51 event. This approach will be perhaps safer but will add some cost.
Thanks for you respone. RK found a solution it had to with my pin configuration. I overwrote the GPIOTE config when setting the pin to no pull for testing. See the post here: devzone.nordicsemi.com/.../
But your idea is pretty good to make a circuit with a short pulse to save even more power. Thanks!