Hello, i have a question about keepout area under antenna trace in multilayer pcb. I have a 4-layer pcb, but substrate height between top layer and first mid layer isn't enough for good 50-ohm trace design, so i decide to make cutout in first mid layer and use second mid layer as ground base. But i'm confused about keepout/cutout area size.
I found these guidelines:
1. According document dm00660594 from STM (http://www.st.com/resource/en/application_note/dm00660594-optimized-rf-board-layout-for-stm32wl-series-stmicroelectronics.pdf) on page 7 cutout width must be = trace width + 2x spacing.
2. Answer on DevZone (https://devzone.nordicsemi.com/f/nordic-q-a/38170/nrf52832-ciaa-hdi-pcb-layout-tips): "It should not be less narrow than the opening in the 'opening' for the coplanar center conductor in the top layer, width of trace + 2*spacing".
3. According document "Rf Layout" from Quectel (https://www.quectel.com/UploadImage/Downlad/Quectel_RF_Layout_Application_Note_V2.0.pdf) on page 8 cutout width must be = trace width x5.
4. Answer on DevZone (https://devzone.nordicsemi.com/f/nordic-q-a/26394/nrf52-layout-questions/103859#103859) also 5x width.
And my question is - what width must have cutout area on inner layers?
