A dual-core would be wonderful: i have already seen a dual-core ultra low power, the M0+ core could be used for stack and radio computing while leaving the M3/M4 core at 100% use of the customer!
Anyway it could be enough for me to have a slightly faster core without the need to be blocked during radio activity (as the nRF51822 rev3) with 1/3 of the current power consumption and some improved peripherals (ADC 12 bit, more SPIs/I2Cs with integrated fifo and configurable interrupts in reception) and .... please use GCC as the main development platform :-))
A dual-core would be wonderful: i have already seen a dual-core ultra low power, the M0+ core could be used for stack and radio computing while leaving the M3/M4 core at 100% use of the customer!
Anyway it could be enough for me to have a slightly faster core without the need to be blocked during radio activity (as the nRF51822 rev3) with 1/3 of the current power consumption and some improved peripherals (ADC 12 bit, more SPIs/I2Cs with integrated fifo and configurable interrupts in reception) and .... please use GCC as the main development platform :-))
