I'm using a nRF52480 DK board with an adafruit 3421 I2S microphone breakout board attached. I am on Ubuntu 20.04 with SES 5.42c and SDK 16.
I am using a variant of the usbd_cdc_acm example along with a Python3 script that provides communication with the DK board for command, data retrieval, display, and storage.
I'm using the Nordic PWM peripheral to produce SCK and LRCK for the microphone and the Nordic I2S peripheral in slave mode. The microphone's SEL is connected to the DK board's ground as is the microphone ground. The microphone is turned on and off via a GPIO pin's set and clear command.
My SCK PWM channel is setup as follows:
My LRCK PWM channel is setup as follows:
SCK is running at 2MHz and LRCK is running at 31250Hz, so my sample rate is 31250Hz.
The following code shows how the I2S peripheral is initialized.
One of the following screen shots is of the low LRCK with SCK and DOUT, (top channel is SCK, next is DOUT, and bottom is LRCK). The other screen shot is a zoom of the same.
Each of the two EasyDMA buffers are 512 uint32_t long. Buffer pointers are passed back to main by the i2s_data_handler. Main has ram allocated to hold 10 of these buffers. When main has filled its buffers, it stops the I2S and PWM peripherals. It then prepares the data for transmission over the secondary USB port of the DK board to the Python3 script.
I'm using an Android app - Tone Generator by epsilon ventures - to generate a "known" signal. I use a 250Hz sine wave. At an LRCK sample rate of 32250Hz, each sample is 32uS, Since the period of my sine wave is 4 mS, each period should be 125 samples long. The following screen shot is a matplotlib.pyplot.plot of 224 of the I2S peripheral's output values of the phone's signal.
Things look like they could be real. This brings me to my questions which concern how to decode the I2S peripheral's output. The following code describes my process and is commented with my reasoning. Could you tell me if my reasoning and methodology is correct?
Question 1: From the documentation, The EasyDMA "...32-bit memory word can ... contain one right-aligned 24-bit sample sign extended to 32 bit." Does sign extended mean that the 23rd bit is repeated 8 times in bits 24 through 31? If the Knowles microphone produces a 24 bit value whose MSB is one, (indicating a negative value), are bits 24 through 31 assigned a value of one? The reason i'm asking is that every negative I2S peripheral value has ff in the most significant 8 bits.
Question 2: Am I right that the I2S peripheral's value has the microphone's value in bits 23 down to bit 0? Where bit 23 is the MSB and bit 0 is LSB?
Question 3: Is this 24 bit thing the same as the 24 bit value that the Knowles microphone is providing or is it a "translation" of some sort, (as with a PDM microphone)? If it is a "translation" are all 24 bits used and what do they represent?
Question 4: If the I2S peripheral's bit 0 through 23 is the same as the Knowles microphones's 24 bit value, then bits 0 through 5 are the zero padding mentioned in the Knowles data sheet and can be discarded?
Question 5: Could I have a syncing problem between my SCK and LRCK? Is it correct to think that as long as LRCK is low and low long enough to accommodate 32 SCK pulses, the microphone will transmit all of it's data? You'll notice in my initialization of the LRCK PWM, I lengthen the duty cycle by one. So the LRCK's duty cycle is 51%. I did this because the tracings showed some LRCK low periods were questionably encompassing 32 separate SCK pulses on a 50% duty cycle.I thought this 51% duty cycle would be acceptable since I am mono and configure the I2S peripheral as just left channel. My thinking is that since the I2S peripheral is ignoring the right channel, the length of time that LRCK is highr can be a bit shorter. As far as I can make out the microphone doesn't even respond to LRCK high when SEL is grounded. I'm thinking that while the microphone may not mind, the Nordic I2S peripheral is adversely effected
Any comments, questions, answers are appreciated. Thank you.