Build zephyr.elf versus Build solution

[Learner]

I can see in Segger Embedded Studio v4.52 under the Build Tab, there are two methods to build the project.

1- Build > Build zephyr/zephyr.elf

2- Build > Build solution

What is the difference between the two methods?

Kind regards

[Heidi]

Hi again!

So, first of all, to answer your questions about SPI:

You are right, I did not catch that part. I have sent a message to the Nordic developer that has written this, but since they are based in LA I won't have an answer on this until tomorrow.

I just received an answer about this.

"An index representing the peripheral’s chip select line number. (If there is no chip select line, 0 is used.)"

The spi1 node has a cs-gpios property, which means that the unit addresses for node a and b (0 and 1 respectively) are indexes into the cs-gpios array (an index representing the peripheral's chip select line number). The spi1 node has no cs-gpios, so node c has no chip select configured in the device tree, and therefore its unit address is left at 0 (if there is no chip select line, 0 is used). 

In all your overlay examples you're still instantiating the ADC peripheral, which we don't want to do. 

This is the template you want to follow:

/ {
    n: node {
        compatible = " ";
        io-channels = <&adc 4>;
	    label = "AIN_0";
	};
};

The forward slash indicates the root node and is very important to include.

To include multiple ADC io-channels, just refer to the adc-node each time like this (not &adc5 and &adc7):

io-channels = <&adc 26>, <&adc 28>;

and if you want to use a different compatible property for the two nodes, you need to create two separate nodes like this:

/ {
    n: node_a {
        compatible = " ";
        io-channels = <&adc 26>;
	    label = "AIN_5";
	};
	
    n: node_b {
        compatible = " ";
        io-channels = <&adc 28>;
	    label = "AIN_7";
	};
};

For you question about voltage-divider

The lower leg is not a resistor, but the other one is a resistor? Or are you using a capacitive divider where both elements are capacitors?

For your binding question, yes this is the correct way to do it, using the label you defined in the node.

adc_dev_5 = device_get_binding("AIN_5");

adc_dev_7 = device_get_binding("AIN_7");

To do the binding for the two analog inputs, this is how to do it for AIN_5 and AIN_7 respectively.

device_get_binding(DT_IO_CHANNELS_LABEL_BY_IDX(DT_NODELABEL(n),0))
device_get_binding(DT_IO_CHANNELS_LABEL_BY_IDX(DT_NODELABEL(n),1))

Best regards,

Heidi

[Learner]

Thank you Heidi for your help.

Heidi said:

The spi1 node has a cs-gpios property, which means that the unit addresses for node a and b (0 and 1 respectively) are indexes into the cs-gpios array (an index representing the peripheral's chip select line number). The spi1 node has no cs-gpios, so node c has no chip select configured in the device tree, and therefore its unit address is left at 0 (if there is no chip select line, 0 is used).

I can see what you are saying here. However, it is still rather confusing because looking at the definition of sub-node (a) and sub-node (c) they are identical but in fact they are telling us different information about the sub-node.

Learner said:

* a: spi-dev-a@0 {
* reg = <0>;
* };

Learner said:

* c: spi-dev-c@0 {
* reg = <0>;
* };

Heidi said:

This is the template you want to follow:

This is how my overlay file looks,

/ {
n: node {
compatible = " ";
io-channels = <&adc 4>;
label = "AIN_0";
};
};

&pwm0 {
ch0-pin = < 29 >;
};

The project now loads but I am getting build errors. I am including the build log and the devicetree_unfixed.h.

Heidi said:

The lower leg is not a resistor, but the other one is a resistor? Or are you using a capacitive divider where both elements are capacitors?

Yes, the upper leg is a resistor and the lower leg is a capacitor.

Kind regards

Mohamed

[Learner]

Here are the two files devicetree_unfixed.h and build_log.txt.

devicetree_unfixed.h7853.Build_log.txt

[Learner]

If I include in main.c 

#include <hal/nrf_saadc.h>

and use this overlay file 

&pwm0 {
   ch0-pin = < 29 >;
};

/ {
      n: node {
         compatible = "voltage-divider";
         io-channels = <&adc 4>;
         label = "AIN_0";
      };
};

then I get a different error,

devicetree error: 'output-ohms' is marked as required in 'properties:' in C:/Zypher/v1.3.0/zephyr/dts/bindings\adc\voltage-divider.yaml, but does not appear in <Node /node in 'nrf5340pdk_nrf5340_cpuapp.dts.pre.tmp'>

This suggests I need to add these two lines to the device tree fragment in the overlay file

output-ohms = <???>;
full-ohms = <(??? + ???)>;

But I am not sure if the "voltage-divider" works with an R-C circuit?

Finally, get_binding() does not bind AIN_0, it can only bind ADC_0.

Are you sure the label line can have something other than ADC_0?

Maybe I Should make changes to the source code (the light intensity controller example) in main.c when I am using the overlay file ?

Kind regards

Mohamed

[Heidi]

Hi!

Learner said:

However, it is still rather confusing because looking at the definition of sub-node (a) and sub-node (c) they are identical but in fact they are telling us different information about the sub-node.

 I agree that it might be confusing, but you cannot look at the unit-addresses of nodes alone, you always have to look at the unit-address in context to the parent node. And when you look at the parent node of sub-node a versus sub-node c it becomes clear that sub-node a's "0" means an index into the cs-gpios array and sub-node c's "0" is just "NULL". 

For the binding, I was wrong, you cannot just use the raw string as the argument. You need to use the following macros for the first and second IO-channel respectively:

DT_IO_CHANNELS_LABEL_BY_IDX(DT_NODELABEL(n),0)
DT_IO_CHANNELS_LABEL_BY_IDX(DT_NODELABEL(n),1)

As for the issue with the voltage-divider, I am just as confused as you but I will ask around if anyone has any experience using it with the circuit you are using.

 

Learner said:

Maybe I Should make changes to the source code (the light intensity controller example) in main.c when I am using the overlay file ?

 What do you mean by this? I assume you will have to change the main.c file, firstly to bind the IO-channels. 

Best regards,

Heidi

[Learner]

Good morning Heidi,

Heidi said:

What do you mean by this? I assume you will have to change the main.c file, firstly to bind the IO-channels. 

Yes, of course, to get the binding to work using the new labels with the DT_ macros.

ADC raw (LSB) conversion results:                                                                                                                 ----------------------------------------------

I used ADC on various microcontrollers before and the ADC peripherals were straight forward to use and always provided raw (LSB) a2d results. Whys is it so complicated with this SoC/zephyr?

Why can't I use the "nordic,nrf-saadc" driver since it is the native nordic adc driver?

General questions:                                                                                                                                           ------------------------

1- How can I add a comment in the overlay and dts files? I added few lines with a leading # but it caused problems. Does the # need to be in a particular location on a line?

2- I sometimes see fragment of DeviceTree code containing this @... Does this mean the user has to replace the ... with a number?

Thank you.

Kind regards

Mohamed