SPIM RX started by ppi delay about 6us

[xjhu]

HI all,I am looking for a help.how to start SPIM RX task immediately delay less than 2us？

I have a SPIM test on 52832 DK board(QFAAE0) with SDK16.0, the MISO pin has connected with a GPIOTE pin together,when GPIOTE HITOLO event happened,ppi will trigger SPIM START task,but the bytes received are not correct,because the rx started with 6us delay, in the scope picture the yellow wave is MISO and the blue wave is SCK.I have tested nrf_drv_clock_hfclk_request and sd_power_mode_set(NRF_POWER_MODE_CONSTLAT),but there was not a noticable effect.

my test code are here:

static uint32_t nnn = 0;
nnn = sd_power_mode_set(NRF_POWER_MODE_CONSTLAT);

nrf_drv_gpiote_init();
nrf_drv_gpiote_in_config_t cfg = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
nrfx_err_t err_code = nrf_drv_gpiote_in_init(PIN_SPI_RXD, &cfg, spim_gpiote_event_handler);
APP_ERROR_CHECK(err_code);
nrf_drv_gpiote_in_event_enable(PIN_SPI_RXD, true);

nrfx_spim_config_t spi_config = NRFX_SPIM_DEFAULT_CONFIG;
spi_config.mode = NRF_SPIM_MODE_0;
spi_config.frequency = NRF_SPIM_FREQ_500K;
spi_config.ss_pin = NRFX_SPIM_PIN_NOT_USED;
spi_config.miso_pin = PIN_SPI_RX;
spi_config.mosi_pin = NRFX_SPIM_PIN_NOT_USED;//PIN_SPI_TX;
spi_config.sck_pin = PIN_SPI_SCK;
APP_ERROR_CHECK(nrfx_spim_init(&spim, &spi_config, spim_event_handler, NULL));
nrf_gpio_cfg(
PIN_SPI_RX,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
NRF_GPIO_PIN_PULLUP,
NRF_GPIO_PIN_H0H1,
NRF_GPIO_PIN_NOSENSE);

spi_xfer_done = false;
nrfx_spim_xfer_desc_t xfer_desc = NRFX_SPIM_XFER_TRX(NULL, 0, m_rx_buf, sizeof(m_rx_buf));
APP_ERROR_CHECK(nrfx_spim_xfer(&spim, &xfer_desc, 0));//NRFX_SPIM_FLAG_HOLD_XFER));//
nrf_spim_task_trigger(spim.p_reg, NRF_SPIM_TASK_SUSPEND);
spim_ppi_channel_init();

static bool spim_ppi_channel_init(void)

{

NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)spim.p_reg;
nrf_ppi_channel_include_in_group(SPIM_RX_START_PPI_CHANNEL, SPIM_RX_GROUP_PPI_CHANNEL);
nrf_ppi_channel_and_fork_endpoint_setup(SPIM_RX_START_PPI_CHANNEL,
nrf_drv_gpiote_in_event_addr_get(PIN_SPI_RXD),
nrf_spim_task_address_get(p_spim, NRF_SPIM_TASK_RESUME),//NRF_SPIM_TASK_START),
(uint32_t)nrf_ppi_task_group_disable_address_get(SPIM_RX_GROUP_PPI_CHANNEL));
nrf_ppi_group_enable(SPIM_RX_GROUP_PPI_CHANNEL);

}

void spim_event_handler(nrfx_spim_evt_t const * p_event,
void * p_context)
{
spi_xfer_done = true;
NRF_LOG_INFO("Transfer completed.");
if (m_rx_buf[0] != 0)
{
NRF_LOG_INFO(" Received:");
NRF_LOG_HEXDUMP_INFO(m_rx_buf, 16);
}
nrfx_spim_xfer_desc_t xfer_desc = NRFX_SPIM_XFER_TRX(NULL, 0, m_rx_buf, sizeof(m_rx_buf));
APP_ERROR_CHECK(nrfx_spim_xfer(&spim, &xfer_desc, 0));//NRFX_SPIM_FLAG_HOLD_XFER));
nrf_spim_task_trigger(spim.p_reg, NRF_SPIM_TASK_SUSPEND);
// nrf_ppi_group_enable(SPIM_TX_STOP_GROUP_PPI_CHANNEL);
nrf_ppi_group_enable(SPIM_RX_GROUP_PPI_CHANNEL);
}

[Håkon Alseth]

Hi,

 

xjhu said:

like my first test code,i have called sd_power_mode_set(NRF_POWER_MODE_CONSTLAT).and it is no effect..

 This is strange. If you disable SD and use WFE, you get 2 us, which is still higher than what I get.

I integrated my test into ble_app_template, with NRF_LOG disabled, still get 1 us delay at my end. Could you try the algorithm I posted to see if this gets you the same timing?

xjhu said:

I modify nrfx_spim_init like below, and i got high first but return to low when call nrf_spim_enable(p_spim).I think maybe spim put mosi to low by default.

 I suspected this, unfortunately. The SPI module takes over the GPIOs and configures them towards how it should actively handle the pins. MOSI = master out, slave in, meaning its an output seen from the nRF's point-of-view, and it has been set to a defined level.

There's no guarantee that you can override a GPIO that has been claimed by a peripheral, especially an output configured one.

 

Kind regards,

Håkon

[xjhu]

Thank you very much.

the 6us delay like disapeared after i turn off NRF_LOG_ENABLED = 0,there has a strange thing when i turn on NRF_LOG again,the delay still less than 2us.

Håkon Alseth said:

There's no guarantee that you can override a GPIO that has been claimed by a peripheral, especially an output configured one.

are you mean there has no way to turn mosi high after spim enable?

[Håkon Alseth]

If you look at figure 1 here in the GPIO chapter of the PS, the override signal from the peripheral is DIR_OVERRIDE and OUT_OVERRIDE, which disconnects the original GPIO configuration:

https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/gpio.html?cp=4_2_0_19#concept_zyt_tcb_lr

 

Kind regards,

Håkon