hi support team,
customer has one question about TWI electricity. in the IIC spec the "tLow " should be more than 1.3 us

however, our chip interface TWI timing " tLow " is not list in spec(49.9.2 Two Wire Interface (TWI) timing specifications) as below

unfortunately, from our errata, that our TWIM seems to be somehow wrong according to such link:
so, if our chip meeting this requirement, if yes do we have document about this? if not, what's the workaround(TWI), any consequence?
Regards,
William.