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52832 twi clk low time ---"tLow" is not clarified in spec

hi support team,

customer has one question about TWI electricity. in the IIC spec the "tLow " should be more than 1.3 us

datasheet of connected TWI device

however, our chip interface TWI timing " tLow " is not list in spec(49.9.2 Two Wire Interface (TWI) timing specifications) as below

unfortunately, from our errata, that our TWIM seems to be somehow wrong according to such link:

https://infocenter.nordicsemi.com/topic/errata_nRF52832_Rev2/ERR/nRF52832/Rev2/latest/anomaly_832_219.html

so, if our chip meeting this requirement, if yes do we have document about this? if not, what's the workaround(TWI), any consequence?

Regards,

William.

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