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QSPI Flash compatibility W25M02GVZEIG

w25m02gv revf 050918 unsecured.pdf

Hi, I've got our custom board with W25M02GVZEIG and I want to be able to read it out in a way that is fast and works with XIP. It's ok if it takes more time to write.

So far, it looks like there is no compatible addressing mode. Opcode 0x6B and 0xEB, in nRF5340 QSPI,  have different numbers of address bytes and dummy bits that the flash part.

I'm hoping there is a way, with a bit of hacking ok, to get this part to work, as it is already on the board.

Let me know if I can provide more information, but the timing charts in the nRF5340 datasheet and in the flash datasheet (attached). Thanks for any help I really appreciate it!

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  • Hi,

    If I read the datasheet of the flash device correct, the "Instruction Set Table 1" in section 8.1.2 seems to match the nRF5340 QSPI documentation. According to the datasheet, you should be able to set the flash chip in Continuous Read mode by writing the BUF = 0, even if you have the xxIG model which powers up with BUF = 1.

    Best regards,
    Jørgen

  • Thanks so much for your reply, I've got another question and could use your expertise.

    If I use continuous read mode (BUF=0), the address bits are all dummy.

    I assume that XIP will map the external flash data to the nRF5340 memory space (read only of course). Will I still be able to access the external flash memory the same as the internal flash memory, by simply using it like any other memory location? I'm failing to see how the nRF will know where (at which address) in external flash, to read, when I attempt to access a given address within the XIP mapped space.

    Any hits will be appreciated, but I will go ahead and experiment with continuous read (BUF=0) mode. Thanks!

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  • Thanks so much for your reply, I've got another question and could use your expertise.

    If I use continuous read mode (BUF=0), the address bits are all dummy.

    I assume that XIP will map the external flash data to the nRF5340 memory space (read only of course). Will I still be able to access the external flash memory the same as the internal flash memory, by simply using it like any other memory location? I'm failing to see how the nRF will know where (at which address) in external flash, to read, when I attempt to access a given address within the XIP mapped space.

    Any hits will be appreciated, but I will go ahead and experiment with continuous read (BUF=0) mode. Thanks!

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