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NRF52832 custom board not detected after flashing zephyr program

Hi, I have the same issue with 

https://devzone.nordicsemi.com/f/nordic-q-a/59096/nrf52832-module-can-t-connect-j-link-anymore-after-flashing-zephyr-program-onto-it

but the question is a year old and author didn't answer the reply so I decided to post a new one.

Code is working on a nRF-52DK.

So I created a PCB with e73-2g4m04s1b module in it. Device can be detected with nrfjprog. 

Next is maybe there is wrong with my module so I tested all contacts and all connections are good. So I assembled a second board so I can rule out that maybe the module is defective, nrfjprog detects it , device and recover all good. After flash again the board is not detected.

So last try I soldered another board leaving just the module and header connector and same scenario , now I got three non detected boards.

Normally I don't create custom board profile, I just adapt the pin numbering of DK on my custom board. I have made different projects with this module with arduino and visual studio code with platformio plugin, with board selected as nrf52dk even though real target is a custom board with e73-2g4m04s1b. So now I want to apply more advance features so I tried zephyr and after uploading the code the board is not detected. I only discovered that zephyr is causing the issue after the third board is bricked.

I went through the e73-2g4m04s1b and found out that the xtal is 24mhz, versus the DK has 32mhz xtal. But why this has work before with arduino environment with nrf52dk set as board. Or is there anything I must do with the zephyr code/configurations?

Can I still recover my e73-2g4m04s1b modules? RST pin shows 0v, tried pulling it at VDD but with the same result not detected.

Parents
  • So I found this thread on github.

    https://github.com/zephyrproject-rtos/zephyr/issues/25379

    And check the arduino nrf5 cores and by default DCDC is disabled,  but on zephyr it is enabled. so I edited the kconfig > default from y to n

    config BOARD_ENABLE_DCDC
    	bool "Enable DCDC mode"
    	select SOC_DCDC_NRF52X
    	default n
    	depends on BOARD_NRF52DK_NRF52832


    Feeling confident I went to the 4th board. Now it is not detected again after upload. I got one last module left to try with 4 non detected boards.  

    Btw here is my last upload log on vscode with platformio and zephyr framework

    > Executing task: platformio run --target upload --environment nrf52_dk <
    
    Processing nrf52_dk (platform: nordicnrf52; board: nrf52_dk; framework: zephyr)
    ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Verbose mode can be enabled via `-v, --verbose` option
    CONFIGURATION: https://docs.platformio.org/page/boards/nordicnrf52/nrf52_dk.html
    PLATFORM: Nordic nRF52 (7.0.0) > Nordic nRF52-DK
    HARDWARE: NRF52832 64MHz, 64KB RAM, 512KB Flash
    DEBUG: Current (jlink) On-board (cmsis-dap, jlink) External (blackmagic, stlink)
    PACKAGES: 
     - framework-zephyr 2.20500.210226 (2.5.0) 
     - framework-zephyr-canopennode 0.0.0-alpha+sha.468d350028 
     - framework-zephyr-civetweb 0.0.0-alpha+sha.e6903b80c0 
     - framework-zephyr-cmsis 0.0.0-alpha+sha.c3bd2094f9 
     - framework-zephyr-fatfs 0.0.0-alpha+sha.1d1fcc725a 
     - framework-zephyr-hal-nordic 0.0.0-alpha+sha.f0d54d8449 
     - framework-zephyr-hal-st 0.0.0-alpha+sha.b52fdbf4b6 
     - framework-zephyr-libmetal 0.0.0-alpha+sha.9d4ee2c3cf 
     - framework-zephyr-littlefs 0.0.0-alpha+sha.9e4498d1c7 
     - framework-zephyr-loramac-node 0.0.0-alpha+sha.3f545d76a2 
     - framework-zephyr-lvgl 0.0.0-alpha+sha.31acbaa36e 
     - framework-zephyr-mbedtls 0.0.0-alpha+sha.24d84ecff1 
     - framework-zephyr-mcuboot 0.0.0-alpha+sha.3fc59410b6 
     - framework-zephyr-mcumgr 0.0.0-alpha+sha.43845e883f 
     - framework-zephyr-mipi-sys-t 0.0.0-alpha+sha.75e671550a 
     - framework-zephyr-open-amp 0.0.0-alpha+sha.de1b85a130 
     - framework-zephyr-openthread 0.0.0-alpha+sha.1d668284a0 
     - framework-zephyr-segger 0.0.0-alpha+sha.38c79a447e 
     - framework-zephyr-sof 0.0.0-alpha+sha.b5b772dd61 
     - framework-zephyr-tfm-mcuboot 1.7.0-rc1 
     - framework-zephyr-tinycbor 0.0.0-alpha+sha.40daca97b4 
     - framework-zephyr-tinycrypt 0.0.0-alpha+sha.3e9a49d267 
     - framework-zephyr-trusted-firmware-m 0.0.0-alpha+sha.96340fb6c0 
     - tool-bossac-nordicnrf52 1.10901.201022 (1.9.1) 
     - tool-cmake 3.16.4 
     - tool-dtc 1.4.7 
     - tool-gperf 3.0.4 
     - tool-jlink 1.68801.0 (6.88.1) 
     - tool-ninja 1.7.1 
     - tool-openocd 2.1000.200630 (10.0) 
     - tool-sreccat 1.164.0 (1.64) 
     - toolchain-gccarmnoneeabi 1.80201.181220 (8.2.1)
    LDF: Library Dependency Finder -> http://bit.ly/configure-pio-ldf
    LDF Modes: Finder ~ chain, Compatibility ~ soft
    Found 1 compatible libraries
    Scanning dependencies...
    Dependency Graph
    |-- <analogIn>
    Building in release mode
    Checking size .pio/build/nrf52_dk/firmware.elf
    Advanced Memory Usage is available via "PlatformIO Home > Project Inspect"
    RAM:   [====      ]  35.9% (used 23521 bytes from 65536 bytes)
    Flash: [===       ]  29.8% (used 156256 bytes from 524288 bytes)
    Configuring upload protocol...
    AVAILABLE: blackmagic, cmsis-dap, jlink, mbed, nrfjprog, stlink
    CURRENT: upload_protocol = jlink
    Uploading .pio/build/nrf52_dk/firmware.hex
    SEGGER J-Link Commander V6.88b (Compiled Nov 27 2020 16:43:11)
    DLL version V6.88a, compiled Nov 18 2020 16:08:10
    
    
    J-Link Command File read successfully.
    Processing script file...
    
    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link V9 compiled Jun  2 2222 22:22:22
    Hardware version: V9.40
    S/N: 59401308
    License(s): GDB, RDI, FlashBP, FlashDL, JFlash, RDDI
    VTref=3.301V
    Target connection not established yet but required for command.
    Device "NRF52832_XXAA" selected.
    
    
    Connecting to target via SWD
    InitTarget() start
    InitTarget() end
    Found SW-DP with ID 0x2BA01477
    Unknown DP version. Assuming DPv0
    Scanning AP map to find all available APs
    AP[2]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x24770011)
    AP[1]: JTAG-AP (IDR: 0x02880000)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
    ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
    ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
    ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
    ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
    ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
    Cortex-M4 identified.
    PC = FFFFFFFE, CycleCnt = 00000008
    R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000
    R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000
    R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
    R12= 00000000
    SP(R13)= FFFFFFD8, MSP= FFFFFFD8, PSP= 00000000, R14(LR) = FFFFFFF9
    XPSR = 01000003: APSR = nzcvq, EPSR = 01000000, IPSR = 003 (HardFaultMemManage)
    CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
    
    FPS0 = 00000000, FPS1 = 00000000, FPS2 = 00000000, FPS3 = 00000000
    FPS4 = 00000000, FPS5 = 00000000, FPS6 = 00000000, FPS7 = 00000000
    FPS8 = 00000000, FPS9 = 00000000, FPS10= 00000000, FPS11= 00000000
    FPS12= 00000000, FPS13= 00000000, FPS14= 00000000, FPS15= 00000000
    FPS16= 00000000, FPS17= 00000000, FPS18= 00000000, FPS19= 00000000
    FPS20= 00000000, FPS21= 00000000, FPS22= 00000000, FPS23= 00000000
    FPS24= 00000000, FPS25= 00000000, FPS26= 00000000, FPS27= 00000000
    FPS28= 00000000, FPS29= 00000000, FPS30= 00000000, FPS31= 00000000
    FPSCR= 00000000
    
    Downloading file [.pio/build/nrf52_dk/firmware.hex]...
    Comparing flash   [100%] Done.
    Erasing flash     [100%] Done.
    Programming flash [100%] Done.
    J-Link: Flash download: Bank 0 @ 0x00000000: 1 range affected (163840 bytes)
    J-Link: Flash download: Total: 2.912s (Prepare: 0.018s, Compare: 0.012s, Erase: 0.000s, Program & Verify: 2.877s, Restore: 0.003s)
    J-Link: Flash download: Program & Verify speed: 55 KB/s
    O.K.
    
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    
    
    Script processing completed.
    
    ========================================================================== [SUCCESS] Took 4.70 seconds ==========================================================================
    
    Environment    Status    Duration
    -------------  --------  ------------
    nrf52_dk       SUCCESS   00:00:04.704
    ========================================================================== 1 succeeded in 00:00:04.704 ==========================================================================
    
    


    And here are the schematic for reference.

Reply
  • So I found this thread on github.

    https://github.com/zephyrproject-rtos/zephyr/issues/25379

    And check the arduino nrf5 cores and by default DCDC is disabled,  but on zephyr it is enabled. so I edited the kconfig > default from y to n

    config BOARD_ENABLE_DCDC
    	bool "Enable DCDC mode"
    	select SOC_DCDC_NRF52X
    	default n
    	depends on BOARD_NRF52DK_NRF52832


    Feeling confident I went to the 4th board. Now it is not detected again after upload. I got one last module left to try with 4 non detected boards.  

    Btw here is my last upload log on vscode with platformio and zephyr framework

    > Executing task: platformio run --target upload --environment nrf52_dk <
    
    Processing nrf52_dk (platform: nordicnrf52; board: nrf52_dk; framework: zephyr)
    ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Verbose mode can be enabled via `-v, --verbose` option
    CONFIGURATION: https://docs.platformio.org/page/boards/nordicnrf52/nrf52_dk.html
    PLATFORM: Nordic nRF52 (7.0.0) > Nordic nRF52-DK
    HARDWARE: NRF52832 64MHz, 64KB RAM, 512KB Flash
    DEBUG: Current (jlink) On-board (cmsis-dap, jlink) External (blackmagic, stlink)
    PACKAGES: 
     - framework-zephyr 2.20500.210226 (2.5.0) 
     - framework-zephyr-canopennode 0.0.0-alpha+sha.468d350028 
     - framework-zephyr-civetweb 0.0.0-alpha+sha.e6903b80c0 
     - framework-zephyr-cmsis 0.0.0-alpha+sha.c3bd2094f9 
     - framework-zephyr-fatfs 0.0.0-alpha+sha.1d1fcc725a 
     - framework-zephyr-hal-nordic 0.0.0-alpha+sha.f0d54d8449 
     - framework-zephyr-hal-st 0.0.0-alpha+sha.b52fdbf4b6 
     - framework-zephyr-libmetal 0.0.0-alpha+sha.9d4ee2c3cf 
     - framework-zephyr-littlefs 0.0.0-alpha+sha.9e4498d1c7 
     - framework-zephyr-loramac-node 0.0.0-alpha+sha.3f545d76a2 
     - framework-zephyr-lvgl 0.0.0-alpha+sha.31acbaa36e 
     - framework-zephyr-mbedtls 0.0.0-alpha+sha.24d84ecff1 
     - framework-zephyr-mcuboot 0.0.0-alpha+sha.3fc59410b6 
     - framework-zephyr-mcumgr 0.0.0-alpha+sha.43845e883f 
     - framework-zephyr-mipi-sys-t 0.0.0-alpha+sha.75e671550a 
     - framework-zephyr-open-amp 0.0.0-alpha+sha.de1b85a130 
     - framework-zephyr-openthread 0.0.0-alpha+sha.1d668284a0 
     - framework-zephyr-segger 0.0.0-alpha+sha.38c79a447e 
     - framework-zephyr-sof 0.0.0-alpha+sha.b5b772dd61 
     - framework-zephyr-tfm-mcuboot 1.7.0-rc1 
     - framework-zephyr-tinycbor 0.0.0-alpha+sha.40daca97b4 
     - framework-zephyr-tinycrypt 0.0.0-alpha+sha.3e9a49d267 
     - framework-zephyr-trusted-firmware-m 0.0.0-alpha+sha.96340fb6c0 
     - tool-bossac-nordicnrf52 1.10901.201022 (1.9.1) 
     - tool-cmake 3.16.4 
     - tool-dtc 1.4.7 
     - tool-gperf 3.0.4 
     - tool-jlink 1.68801.0 (6.88.1) 
     - tool-ninja 1.7.1 
     - tool-openocd 2.1000.200630 (10.0) 
     - tool-sreccat 1.164.0 (1.64) 
     - toolchain-gccarmnoneeabi 1.80201.181220 (8.2.1)
    LDF: Library Dependency Finder -> http://bit.ly/configure-pio-ldf
    LDF Modes: Finder ~ chain, Compatibility ~ soft
    Found 1 compatible libraries
    Scanning dependencies...
    Dependency Graph
    |-- <analogIn>
    Building in release mode
    Checking size .pio/build/nrf52_dk/firmware.elf
    Advanced Memory Usage is available via "PlatformIO Home > Project Inspect"
    RAM:   [====      ]  35.9% (used 23521 bytes from 65536 bytes)
    Flash: [===       ]  29.8% (used 156256 bytes from 524288 bytes)
    Configuring upload protocol...
    AVAILABLE: blackmagic, cmsis-dap, jlink, mbed, nrfjprog, stlink
    CURRENT: upload_protocol = jlink
    Uploading .pio/build/nrf52_dk/firmware.hex
    SEGGER J-Link Commander V6.88b (Compiled Nov 27 2020 16:43:11)
    DLL version V6.88a, compiled Nov 18 2020 16:08:10
    
    
    J-Link Command File read successfully.
    Processing script file...
    
    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link V9 compiled Jun  2 2222 22:22:22
    Hardware version: V9.40
    S/N: 59401308
    License(s): GDB, RDI, FlashBP, FlashDL, JFlash, RDDI
    VTref=3.301V
    Target connection not established yet but required for command.
    Device "NRF52832_XXAA" selected.
    
    
    Connecting to target via SWD
    InitTarget() start
    InitTarget() end
    Found SW-DP with ID 0x2BA01477
    Unknown DP version. Assuming DPv0
    Scanning AP map to find all available APs
    AP[2]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x24770011)
    AP[1]: JTAG-AP (IDR: 0x02880000)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
    ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
    ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
    ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
    ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
    ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
    Cortex-M4 identified.
    PC = FFFFFFFE, CycleCnt = 00000008
    R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000
    R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000
    R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
    R12= 00000000
    SP(R13)= FFFFFFD8, MSP= FFFFFFD8, PSP= 00000000, R14(LR) = FFFFFFF9
    XPSR = 01000003: APSR = nzcvq, EPSR = 01000000, IPSR = 003 (HardFaultMemManage)
    CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
    
    FPS0 = 00000000, FPS1 = 00000000, FPS2 = 00000000, FPS3 = 00000000
    FPS4 = 00000000, FPS5 = 00000000, FPS6 = 00000000, FPS7 = 00000000
    FPS8 = 00000000, FPS9 = 00000000, FPS10= 00000000, FPS11= 00000000
    FPS12= 00000000, FPS13= 00000000, FPS14= 00000000, FPS15= 00000000
    FPS16= 00000000, FPS17= 00000000, FPS18= 00000000, FPS19= 00000000
    FPS20= 00000000, FPS21= 00000000, FPS22= 00000000, FPS23= 00000000
    FPS24= 00000000, FPS25= 00000000, FPS26= 00000000, FPS27= 00000000
    FPS28= 00000000, FPS29= 00000000, FPS30= 00000000, FPS31= 00000000
    FPSCR= 00000000
    
    Downloading file [.pio/build/nrf52_dk/firmware.hex]...
    Comparing flash   [100%] Done.
    Erasing flash     [100%] Done.
    Programming flash [100%] Done.
    J-Link: Flash download: Bank 0 @ 0x00000000: 1 range affected (163840 bytes)
    J-Link: Flash download: Total: 2.912s (Prepare: 0.018s, Compare: 0.012s, Erase: 0.000s, Program & Verify: 2.877s, Restore: 0.003s)
    J-Link: Flash download: Program & Verify speed: 55 KB/s
    O.K.
    
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    
    
    Script processing completed.
    
    ========================================================================== [SUCCESS] Took 4.70 seconds ==========================================================================
    
    Environment    Status    Duration
    -------------  --------  ------------
    nrf52_dk       SUCCESS   00:00:04.704
    ========================================================================== 1 succeeded in 00:00:04.704 ==========================================================================
    
    


    And here are the schematic for reference.

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