Based on s110 v5.2 release note, nRF51822 will have future hardware revision.
What is the change for future hardware revision? Do we need to modify our circuit design for nRF51822 when new hardware revision is released?
Based on s110 v5.2 release note, nRF51822 will have future hardware revision.
What is the change for future hardware revision? Do we need to modify our circuit design for nRF51822 when new hardware revision is released?
Hi Ole, can you give a little bit more information regarding:
What does it do differently from the current IC revision? Thanks
This would probably have worked better as a new question, but anyway: The point is that this comes in addition to the existing concept of code region 0 and code region 1. This means that the softdevice will still occupy code region 0, but using this new feature, you'll be able to mark some parts of code region 1 as read-only, and hence protect for example a bootloader. This will be further explained in an updated Reference Manual, so if you need further details, I'd recommend you wait for this.
This would probably have worked better as a new question, but anyway: The point is that this comes in addition to the existing concept of code region 0 and code region 1. This means that the softdevice will still occupy code region 0, but using this new feature, you'll be able to mark some parts of code region 1 as read-only, and hence protect for example a bootloader. This will be further explained in an updated Reference Manual, so if you need further details, I'd recommend you wait for this.