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nRF52840 sleep and wake-up in high voltage mode

Asher Kim

Hi~.

I have an inquiry about sleep and wake up of the nRF52840 in high voltage mode.

Hardware and power design configuration

I am trying to use high voltage mode by connecting lithium polymer battery to VDDH of nRF52840.

And in order to increase the efficiency for power consumption, we plan to use the DC/DC built in REG0 and REG1.

With this design, the DEFAULT value of the "REGOUT0" register is 1.8V, so the voltage domain of the nRF52840 IO is 1.8V.

Sleep & Wake up condition

When the product is not packaged and used, the nRF52840 will enter sleep mode.

When 5V is applied from the outside to the product, the nRF52840 exits from sleep mode.

Questions

In the data sheet, there are sleep modes in various situations, such as:

When entering Sleep in the state of "System OFF, no RAM retention, wake on reset" under the above conditions (Hardware and power design configuration), the nRF52840 wakes up by applying 1.8V to the reset pin using an external 5V voltage distribution. Can it be?

And if possible, it would be appreciated if you could tell me in detail how to enter Sleep where the nRF52840 can wake up as above.

Thank you for reading. 

Best Regards,

Asher

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  • +1
    When entering Sleep in the state of "System OFF, no RAM retention, wake on reset" under the above conditions (Hardware and power design configuration), the nRF52840 wakes up by applying 1.8V to the reset pin using an external 5V voltage distribution. Can it be?

    Pin reset is an active low input, so it will not help to apply voltage to this pin, it must be set logic low ('0') to reset the chip and wakeup.

    Instead you can use a GPIO to wakeup from system off, simply call for instance:

    nrf_gpio_cfg_sense_input(PIN NUMBER, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH);

    Then call:

    NRF_POWER->SYSTEMOFF = 1;

    Then the chip will wakeup from system OFF if PIN NUMBER is set logic high ('1'). Make sure that the pin is not set higher than <VDD+0.3V. So you need a resistor bridge in this case to reduce 5V to <VDD+0.3V.

    Kenneth

     

Reply
  • +1
    When entering Sleep in the state of "System OFF, no RAM retention, wake on reset" under the above conditions (Hardware and power design configuration), the nRF52840 wakes up by applying 1.8V to the reset pin using an external 5V voltage distribution. Can it be?

    Pin reset is an active low input, so it will not help to apply voltage to this pin, it must be set logic low ('0') to reset the chip and wakeup.

    Instead you can use a GPIO to wakeup from system off, simply call for instance:

    nrf_gpio_cfg_sense_input(PIN NUMBER, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH);

    Then call:

    NRF_POWER->SYSTEMOFF = 1;

    Then the chip will wakeup from system OFF if PIN NUMBER is set logic high ('1'). Make sure that the pin is not set higher than <VDD+0.3V. So you need a resistor bridge in this case to reduce 5V to <VDD+0.3V.

    Kenneth

     

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