error: DWT implements no cycle counter. Cannot be used for cycle counting.

[moose]

Hello, I tried to implement the zephyr executing time functions API on my nrf52 hardware and I got the above error. According to my SoC documentation (nRF52833), this hardware does include a DWT counter. I am not sure if I need to do anything special to configure this hardware or if I need to use a relevant nrfx driver. My code was very similar to the example code in the zephyr documentation mentioned here https://docs.zephyrproject.org/latest/reference/timing_functions/index.html. Any inputs? Thx!

[davege]

Hello,

I'm experiencing exactly the same problem using nrf52840 DK (PCA10056).

If I set CONFIG_TIMING_FUNCTIONS=y, by default the Timing Zephyr subsystem will pick the architecture-dependent implementation (arch_).

So, when invoking timing_init, this function in zephyr\arch\arm\include\aarch32\cortex_m\dwt.h will be invoked:

/**
 * @brief Initialize and Enable the DWT cycle counter
 *
 * This routine enables the cycle counter and initializes its value to zero.
 *
 * @return 0
 */
static inline int z_arm_dwt_init_cycle_counter(void)
{
	/* Clear and enable the cycle counter */
	DWT->CYCCNT = 0;
	DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;

	/* Assert that the cycle counter is indeed implemented. */
	__ASSERT((DWT->CTRL & DWT_CTRL_NOCYCCNT_Msk) != 0,
		"DWT implements no cycle counter. "
		"Cannot be used for cycle counting\n");

	return 0;
}

And contextually, the assert is triggered.

I think this is easily reproducible, I'm using a standard dev kit atm.
I don't have any other board to use with the same chip, but I don't see any reason why it would mean that this board is faulty...

Can anybody try to confirm this?
It maybe a timing issue in the asserting condition.

Note: I initially wondered why a benchmark sample (latency measure) was working fine measuring time with DWT. I then realised that asserts are just disabled in the sample...

...
CONFIG_FORCE_NO_ASSERT=y
...

Thanks in advance for your help!

D

[moose]

Any update on this? I am still experiencing the same issue. Thx!

[Sigurd]

Hi,

There was a bug in earlier NCS versions that made this ASSERT to be ignored(warning about this was printed in the build log).

It's now asserting in NCS v1.6.x.

It looks to be bug in Zephyr, and I have reported it to the developer. 

In the code we have:
__ASSERT((DWT->CTRL & DWT_CTRL_NOCYCCNT_Msk) != 0,

It should be 
__ASSERT((DWT->CTRL & DWT_CTRL_NOCYCCNT_Msk) == 0,

From ARMv7-M Architecture Reference Manual:
NOCYCCNT, bit[25] Shows whether the implementation supports a cycle counter:
0 Cycle counter supported.
1 Cycle counter not supported

From ARMv8-M Architecture Reference Manual:
NOCYCCNT, bit [25]
No cycle count. Indicates whether the implementation does not include a cycle counter.
The possible values of this bit are:
0 Cycle counter implemented.
1 Cycle counter not implemented.

[davege]

Thanks for the follow up Sigurd.

Good to know it is just a minor bug in the code.

Could you keep us posted here on the resolution from the developers?

Thanks

D

[Sigurd]

Sure, I can post a link to the github PR here when it's created.