PCB review nrf52832

[jake11212]

nrf52832_qfaa_dcdcN.SchDocnrf52832_qfaa.PcbLibnrf52832_qfaa.SCHLIBnrf52832_qfax_dcdcN.PcbDoc

Hello, please review my PCB design for the nrf52832 soc.  I think I've included all the necessary files, but let me know if you need anything else or something in a different format. 

I used the nrf52832-QFAA Reference Layout DCDC as the base design for the PCB.

The changes I made were:

1.) Adding a 3.3V CR1632 battery to supply power to the 52832 as well as the PCF8523

2.) Added the PCF8523 RTC based off of the attached reference schematic from the adafruit PCF8523 development kit (https://cdn-learn.adafruit.com/downloads/pdf/adafruit-pcf8523-real-time-clock.pdf).  Pin P0.22 will be configured SCL and pin P0.0.23 will be configured to SDA.  

3.)  Added a 5 pin header with connections for SWDIO, SWDCLK, VDD, GND, and Pin P0.14.  

4.) Added a circuit to allow for attachment of a switch across pins 1 and 2 which will pull pin P0.14 to GND to use in software as a button press active low.

The overall goals are:

1.) Power the entire circuit and RTC with the CR1632 battery

2.) Use an external switch attached across header pins 1 and 2 to pull pin P0.14 to GND

3.) Get the time from the PCF8523 RTC upon button press over TWI using pins P0.22 and P0.23 as SCL and SDA

4.) Send the time over BLE 

5.) Be able to program using header pins 2,3, 4 and 5.

Questions:

I know that it should be possible to program the chip with GND, VDD, SWDIO, SWDCLK but what programmer is specifically used for this type of programming?  And is there functionality to program with this in Segger embedded studio?  

I want to test the power consumption with the power profiler kit.  It looks like the nrf52DK uses DCDC as its power regulator, so would testing the development kit power consumption be mostly representative of the power consumption of this PCB?  How similar would the power consumption be between nrf52DK and this PCB?

I was looking into part sourcing and the X2 oscillator has 4 pads and is listed as XTAL SMD3215.  I wasn't able to find any parts matching this description and was wondering if there was more information on sourcing a similar part.  I was also wondering how closely the tolerance would have to match if an oscillator was substituted.

I also noticed that there wasn't a size description for the oscillators.  Is this listed anywhere?  I wasn't sure how to source the oscillators otherwise without replacing the footprint/pcb.

Thanks!

[Kaja]

Hi,

I will get back to you with a review one of the next couple of business days.

Best regards,
Kaja

[Kaja]

Hi,

so the schematic and layout looks okay. You should add a matching network for an antenna and an antenna:

You might want to use one of the shorter edges for the antenna, so you might want to rotate the chip, and move PCF8523 to the same side as H1. 

To program with chip via the SWD interface you can use a nRF52 DK: 


You can use the online power profiler for BLE and you can use the PPK to measure on your board, see the user guide.

We use a two pad crystal for X2, 32.768 kHz, and a four pad crystal for X1. There should be plenty of crystals to choose from on the marked. 

Size on the crystal is not listed as a specification, you can see what specifications we have LFXO and HFXO

Best regards,
Kaja

[jake11212]

Thanks so much for the review! 

I was planning to just use a ceramic chip antenna (something like this: https://www.digikey.com/en/products/detail/johanson-technology-inc/2450AT42E010BE/6235443) with a 1.2pF capacitor connected to ground after L1, then the chip antenna placed past it.  I based this off of the DK as I wasn't sure what else to use for the matching network for the antenna.  Here is the updated schematic I'm proposing with the antenna, will this suffice?

nrf52832_qfaa_dcdcSecondRevision.SchDoc

My other thought was to use the matching network with a trace antenna that was the same as the one on the development kit (the same 1.2pF capacitor and then copy the width/length of the antenna trace).  The chip version seemed easier to implement and kept the size smaller, but do you have a recommendation for which to go with or a better way to implement a matching network?  I don't have an oscilloscope or equipment to run tests for the matching network so I just wanted to base it off of something similar. 

Also for the trace antenna, can it just be created in altium by adding a trace as you would between any other components?  Or is there a feature specifically for trace antenna drawing?

[Kaja]

For a chip antenna, you would need a fill pi-network for impedance matching, so the schematic should look like this:
 (meander, inverted F..+++ and chip antennas)

jake11212 said:

Also for the trace antenna, can it just be created in altium by adding a trace as you would between any other components?  Or is there a feature specifically for trace antenna drawing?

 You can copy it directly from the DK, just add some mm to the length, for antenna tuning.. or see how to design your own in our whitepaper 

Antenna choice is complex and depends on many factors including technical and commercial considerations. Here are some alternatives, and some considerations: 

Monopole, printed PCB antenna: This is easy to make and easy to tune, you also only need one impedance matching component, so it’s cost effective. Here the spacing is the issues, you need to make it about 23 mm long needs a minimum of 5 mm clearance to the ground plane. High bandwidth, making it fairly resistant to detuning. Link to our whitepaper: https://infocenter.nordicsemi.com/pdf/nwp_008.pdf?cp=12_18

Meander antenna, printed PCB antenna, ex. our dongle antenna design: Requires a smaller area than the monopole antenna, but usually requires a pi-network for tuning in addition to length. Lower bandwidth than a quarter wave monopole antenna. Here is a link to our nRF52840 Dongle design files as an example of this: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle/Download#infotabs

 

Chip antenna: Higher BOM, but the antenna is small. The downside is that it usually has less gain. It requires a matching network, based on the vendors recommendations. It has a lower bandwidth than a quarter wave monopole antenna so it can be sensitive to detuning.

Considering your target of a very small form factor a chip Antenna makes sense but reducing antenna size most often results in reduced performance. Some of the parameters that suffer are:

• Reduced efficiency (or gain)
• Shorter range
• Smaller bandwidth
• Distorted radiation pattern
• More critical tuning
• Increased sensitivity to component and PCB spread
• Increased sensitivity to external factors (“body” effect, ground plane etc.)

It is often better not to reduce antenna size too much, if you can avoid it.

We do not recommend specific chip antennas, and the selection will depend very much on the end application design. The antenna vendors can assist on choosing the right antenna for a specific design, for example Johanson has a useful tool that helps with this selection: https://www.johansontechnology.com/chip-antenna-selection

Best regards,
Kaja

[jake11212]

Thanks for all the info on different antennas, this is really helpful.  Small footprint is much more important than the antenna functionality for now, so I think chip antennas make the most sense for this iteration.

Based on the johansontechnology link I think this antenna makes the most sense:

https://www.johansontechnology.com/datasheets/2450AT42E010B/2450AT42E010B.pdf

The feed line coming off of L1 in my schematic is configured to have an impedance of 50 ohm, correct? 

As long as I keep the trace to the antenna short and don't put many components near it, it should be okay to simply use the L1/C3 matching network and attach the chip antenna at the end of L1 to be approximately correct right?  I was thinking of just doing this, then tuning the network in later iterations.

Also, I know it's hard to estimate power consumption because of how much it varies by component/use but are there estimates for order of magnitude differences between the different options?  Such as chip antennas being half as efficient as meander antennas or just general guidelines for estimating this before we do a board fabrication and power profile?